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23 Commits

Author SHA1 Message Date
Rosen Penev
f5637607a2 bcm53xx: meraki mx6x: use nvmem MAC assignment
Userspace handling is deprecated. Once mac-base goes upstream, the patch
itself can go upstream as well.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22058
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-25 16:17:05 +01:00
Shiji Yang
73a41c38e7 ramips: dts: convert to dt-bindings clock index
Use clock index macros defined in dt-bindings header to improve the
code readability.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22163
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-25 14:06:02 +01:00
Sander Vanheule
ba57225066 realtek: hog the GS1900-24E external IC reset line
The GPIO line connecting to the reset signals of the GS1900-24E(A1)'s
external ICs (RTL8218B phys and RTL8231 expander) cannot be asserted by
the MDIO subsystem, as the reset is shared between busses.

To prevent users from accidentally asserting the reset line, a GPIO hog
is created to permanently de-assert the signal, reliably keeping the
phys and GPIO expanders on.

Tested-by: Simon Fischer <simi.fischa@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-02-24 21:29:26 +01:00
Sander Vanheule
cdbd9eb448 realtek: rtl838x: drop GS1900 MDIO reset GPIO
The reset line wired to the RTL8231 on the GS1900 series may also
connect to other external ICs on the board. On the GS1900-24E, the
reset line is wired (via buffers) to the board's RTL8231 expanders and
the RTL8218 phys. As these external devices (phys) are on different
busses, the reset line shouldn't be specified on one bus or the other.

Drop the reset specification from the generic GPIO description, so it
can be added back on a per-device basis after confirming the behavior.

Link: https://github.com/openwrt/openwrt/issues/18620
Fixes: fd978c2e80 ("realtek: Enable Zyxel GS1900's RTL8231 reset line")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
2026-02-24 21:29:26 +01:00
Hauke Mehrtens
7c5e329b54 wireless-regdb: update to version 2026.02.04
75bedc5 wireless-regdb: Update regulatory info for Australia (AU) for 2025
a6e5195 wireless-regdb: Update broken link in regulatory.bin(5) manpage
9e8c67f wireless-regdb: Update regulatory info for Malaysia (MY) for 2024
61a4637 wireless-regdb: Update regulatory info for Malaysia (MY) for 2025
5cefe55 wireless-regdb: Update regulatory info for Tunisia (TN) on 6GHz for 2025
1a729ae wireless-regdb: Update regulatory info for Canada (CA) for 2025
ea20dfa wireless-regdb: update regulatory database based on preceding changes

Link: https://github.com/openwrt/openwrt/pull/22150
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-02-24 20:24:25 +01:00
Jonas Lochmann
5f063d18bd iproute2: include upstream patch for musl libc
Due to a missing include, the constant UINT_MAX is undefined. This
fixes issues when building v25.12.0-rc5. Including a newer version of
iproute2 would include the patch, but causes other building issues.

Signed-off-by: Jonas Lochmann <openwrt@jonaslochmann.de>
Link: https://github.com/openwrt/openwrt/pull/22128
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-02-24 20:21:50 +01:00
Ahmed Naseef
7ee18e84dc econet: en7528: split DASAN H660GM-A into Airtel and Generic variants
The DASAN H660GM-A GPON ONT exists in two hardware variants, one
distributed by ISPs and one sold directly by the manufacturer [1].

Split the single DTS into a shared dtsi and per-variant DTS files
with the correct GPIO mappings, flash layout, and LED definitions.

Variant comparison:

  Feature        | Airtel                    | Generic
  ---------------+---------------------------+-------------------------
  Supplied by    | Airtel Xstream Fiber      | Retail
  Flash          | Micron MT29F2G01ABAGD     | Micron MT29F1G01ABAFD
                 | 256 MB                    | 128 MB
  Known P/N      | DPW-G-P-66GMAZ-A3         | DPW:G-P-660GMAY-G0
                 | (some units unlabelled)   | DPW:G-P-660GMAY-G3
  WPS LED        | Yes                       | No
  WLAN button    | No                        | Yes
  USB LED        | No                        | Yes
  LAN LEDs       | Green only                | Green + Amber

[1] https://dasanns.com/en/solution/detail.php?mode=view&cat_no=32&offset=&idx=122

Tested-by: Arif Rahman Hakim <arif2785id@gmail.com>
Signed-off-by: Ahmed Naseef <naseefkm@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22095
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2026-02-24 20:17:24 +01:00
Felix Fietkau
55c01365de mac80211: backport eMLSR/eMLMR parsing support
Needed for an upcoming mt76 update

Signed-off-by: Felix Fietkau <nbd@nbd.name>
2026-02-24 19:40:55 +01:00
Mieczyslaw Nalewaj
22ccb445e6 mt7620: workaround jal imm26 and redundant PAGE_ALIGN
On MT7620-class platforms (CONFIG_NET_RALINK_MT7620) we observe sporadic
wrong-jump-targets, kernel oopses, hanging, corrupted backtraces or even
"half-written" instructions when the compiler emits a direct 'jal imm26'
call.
This is triggered in:
  - the small random helpers inside get_random_u32_below(), and
  - the blkcg_maybe_throttle_current() call in resume_user_mode_work().

This patch forces those two call sites to use an indirect call via
a volatile function pointer (load into register + jalr) when building
for MT7620, avoiding embedding a 26-bit immediate jump target.

Additionally, on MT7620 builds the exec path in fs/exec.c is modified:
  - skip arch_align_stack() + PAGE_ALIGN() in setup_arg_pages()
    because the micro-randomization (< PAGE_SIZE) implemented by many
    ports (including MT7620) is negated immediately by PAGE_ALIGN().
    Skipping the redundant PAGE_ALIGN() reduces exposure to the
    problematic code pattern.

These changes are targeted workarounds for MT7620; behavioral logic is unchanged.

Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/20553
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-24 14:40:39 +01:00
Robert Marko
dfbaf84650 ath79: mikrotik: fix DEVICE_PACKAGES
Instead of redifining the DEVICE_PACKAGES, make sure to expand the list
so yafut is included by default as well.

Fixes: 42cd486787 ("ath79: remove kmod-ath9k and wpad from Mikrotik RB750r2")
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-24 14:37:33 +01:00
Robert Marko
7bbe8d560c mvebu: use libdeflate for FitImage
Use libdeflate for faster and better compression in FitImages.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2026-02-24 11:47:22 +01:00
Tim Harvey
231553b280 imx: cortexa53: remove KSZ9477 static driver
The KSZ9477 driver was added to the cortexa53 kernel to support the
Gateworks Venice product family which has a board with this switch. Now
that the kmod-dsa-ksz9477 driver is available as a package remove the
static configuration ad add the package.

This resolves an issue caused by having the switch driver static and the
PHY driver as a module such that the PHY driver was not registered early
enough to be used causing some errata to not be worked around.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22120
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-24 10:48:01 +01:00
Tim Harvey
c053b22573 kernel: netdevices: add KSZ9477 DSA switch packages
This adds kernel packages for the Microchip KSZ9477 switch family.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22120
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-24 10:48:00 +01:00
Rosen Penev
2eb1f7df26 mac80211: ath9k: fix memory leak
sc->gpiochip is assigned to gc when it should be the other way around.
This allows gpiod_free to work properly.

Fixes: e78dc2eae4 ("mac80211: ath9k: clean up gpiochi")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22158
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-24 09:58:42 +01:00
Markus Stockhausen
cf4cd07777 realtek: dsa: allow building as a module
The makefile recipe is wrong and a module compilation tries
to build each object individually. Fix that. This allows to
build the dsa driver as a module.

Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 22:03:03 +01:00
Markus Stockhausen
f45cfd1f43 realtek: eth: remove fixed dsa coupling
The ethernet driver has a hard link to the dsa driver. Especially
the setup_tc() function must be available when the driver loads.
Decouple it by using a dsa callback recipe.

Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 22:03:02 +01:00
Markus Stockhausen
c6bbdb6489 realtek: mach: export soc_info
We do not want to rely on the soc_info structure. But at the moment
it is still referenced in several places. Add an EXPORT() to it.
So drivers that need access to this structure can be build as modules.

Suggested-by: Balázs Triszka <info@balika011.hu>
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22121
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 22:03:02 +01:00
Eicke Herbertz
42cd486787 ath79: remove kmod-ath9k and wpad from Mikrotik RB750r2
The RB750r2 (HEXLite) does not have wifi and those packages bloat the image
by a significant amount. When building a custom image with WireGuard and
booting that from initramfs, there wasn't enough space left in tmpfs to
upload and flash the squashfs image. Investigating what packages I could
remove, I discovered these unneeded ones.

Signed-off-by: Eicke Herbertz <wolletd@posteo.de>
Link: https://github.com/openwrt/openwrt/pull/22134
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 22:00:21 +01:00
Shiji Yang
0bfcb0a36c kernel: net: fix deadlock caused by phy led trigger
Register phy led_triggers earlier to avoid AB-BA deadlock.

Fixes: https://github.com/openwrt/openwrt/issues/18472
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/22136
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 21:56:42 +01:00
Robert Marko
f0c9cbd35b netifd: update to Git HEAD (2026-02-23)
299a51f0c301 global: add support for PSE-PD control

Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 21:46:49 +01:00
Rosen Penev
ee5999cf78 treewide: linksys: use nvmem MAC for hw_mac_addr
Given that Linksys is the same brand and probably use the same OEM, it
stands to reason all devinfo hw_mac_addr implementations are the same.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22092
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 10:56:00 +01:00
Rosen Penev
581d10ebfc ipq806x: nbg6817: use nvmem for MAC addresses
Userspace handling is deprecated. NVMEM allows more flexibility in terms
of exotic setups while keeping correct MAC addresses.

env-size taken from file in uboot-envtools.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22107
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 10:54:08 +01:00
Rosen Penev
aef4d9e677 ipq806x: ac400i: use nvmem for MAC addresses
Userspace handling is deprecated. NVMEM allows flexibility in terms of
exotic setups by avoiding random MAC addresses.

u-boot env-size taken from the entry in uboot-envtools

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22107
Signed-off-by: Robert Marko <robimarko@gmail.com>
2026-02-23 10:54:08 +01:00
60 changed files with 1622 additions and 311 deletions

View File

@@ -1,14 +1,14 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=wireless-regdb
PKG_VERSION:=2025.10.07
PKG_VERSION:=2026.02.04
PKG_RELEASE:=1
PKG_LICENSE:=ISC
PKG_LICENSE_FILES:=LICENSE
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/software/network/wireless-regdb/
PKG_HASH:=d4c872a44154604c869f5851f7d21d818d492835d370af7f58de8847973801c3
PKG_HASH:=0ff48a5cd9e9cfe8e815a24e023734919e9a3b7ad2f039243ad121cf5aabf6c6
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>

View File

@@ -705,6 +705,63 @@ endef
$(eval $(call KernelPackage,dsa-b53-mdio))
define KernelPackage/dsa-ksz9477
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Microchip KSZ9477 family managed switch DSA support
DEPENDS:=+kmod-dsa +kmod-dsa-notag +kmod-phy-micrel +kmod-regmap-core
KCONFIG:= \
CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON \
CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C=n \
CONFIG_NET_DSA_MICROCHIP_KSZ_SPI=n \
CONFIG_NET_DSA_MICROCHIP_KSZ_PTP=n \
CONFIG_NET_DSA_MICROCHIP_KSZ8863_SMI=n \
CONFIG_NET_DSA_TAG_KSZ=y
FILES:= \
$(LINUX_DIR)/drivers/net/dsa/microchip/ksz_switch.ko \
$(LINUX_DIR)/net/dsa/tag_ksz.ko
AUTOLOAD:=$(call AutoProbe,ksz_switch)
endef
define KernelPackage/dsa-ksz9477/description
Microchip KSZ9477 family managed switch support
endef
$(eval $(call KernelPackage,dsa-ksz9477))
define KernelPackage/dsa-ksz9477-i2c
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Microchip KSZ9477 family managed switch DSA support via I2C
DEPENDS:=+kmod-dsa-ksz9477 +kmod-regmap-i2c
KCONFIG:=CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C
FILES:= $(LINUX_DIR)/drivers/net/dsa/microchip/ksz9477_i2c.ko
AUTOLOAD:=$(call AutoProbe,ksz9477_i2c)
endef
define KernelPackage/dsa-ksz9477-i2c/description
Microchip KSZ9477 family managed switch support via I2C
endef
$(eval $(call KernelPackage,dsa-ksz9477-i2c))
define KernelPackage/dsa-ksz9477-spi
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Microchip KSZ9477 family managed switch DSA support via SPI
DEPENDS:=+kmod-dsa-ksz9477 +kmod-regmap-spi
KCONFIG:=CONFIG_NET_DSA_MICROCHIP_KSZ_SPI
FILES:= $(LINUX_DIR)/drivers/net/dsa/microchip/ksz_spi.ko
AUTOLOAD:=$(call AutoProbe,ksz_spi)
endef
define KernelPackage/dsa-ksz9477-spi/description
Microchip KSZ9477 family managed switch support via SPI
endef
$(eval $(call KernelPackage,dsa-ksz9477-spi))
define KernelPackage/dsa-mv88e6060
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Marvell MV88E6060 DSA Switch

View File

@@ -32,7 +32,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#ifdef CPTCFG_ATH9K_DEBUGFS
--- a/drivers/net/wireless/ath/ath9k/gpio.c
+++ b/drivers/net/wireless/ath/ath9k/gpio.c
@@ -16,12 +16,120 @@
@@ -16,12 +16,122 @@
#include "ath9k.h"
@@ -96,7 +96,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+/* register GPIO chip */
+static void ath9k_register_gpio_chip(struct ath_softc *sc)
+{
+ struct gpio_chip *gc = sc->gpiochip;
+ struct gpio_chip *gc;
+ struct ath_hw *ah = sc->sc_ah;
+
+ gc = kzalloc(sizeof(struct gpio_chip), GFP_KERNEL);
@@ -119,6 +119,8 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ kfree(gc);
+ return;
+ }
+
+ sc->gpiochip = gc;
+}
+
+/* remove GPIO chip */
@@ -155,7 +157,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static void ath_fill_led_pin(struct ath_softc *sc)
{
struct ath_hw *ah = sc->sc_ah;
@@ -79,6 +187,12 @@ static int ath_add_led(struct ath_softc
@@ -79,6 +189,12 @@ static int ath_add_led(struct ath_softc
else
ath9k_hw_set_gpio(sc->sc_ah, gpio->gpio, gpio->active_low);
@@ -168,7 +170,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
return 0;
}
@@ -117,16 +231,23 @@ void ath_deinit_leds(struct ath_softc *s
@@ -117,16 +233,23 @@ void ath_deinit_leds(struct ath_softc *s
while (!list_empty(&sc->leds)) {
led = list_first_entry(&sc->leds, struct ath_led, list);
@@ -192,7 +194,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
char led_name[32];
const char *trigger;
@@ -135,6 +256,15 @@ void ath_init_leds(struct ath_softc *sc)
@@ -135,6 +258,15 @@ void ath_init_leds(struct ath_softc *sc)
if (AR_SREV_9100(sc->sc_ah))
return;

View File

@@ -0,0 +1,412 @@
From: Lorenzo Bianconi <lorenzo@kernel.org>
Date: Thu, 29 Jan 2026 14:15:46 +0100
Subject: [PATCH] wifi: mac80211: Add eMLSR/eMLMR action frame parsing support
Introduce support in AP mode for parsing of the Operating Mode Notification
frame sent by the client to enable/disable MLO eMLSR or eMLMR if supported
by both the AP and the client.
Add drv_set_eml_op_mode mac80211 callback in order to configure underlay
driver with eMLSR/eMLMR info.
Tested-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20260129-mac80211-emlsr-v4-1-14bdadf57380@kernel.org
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
--- a/include/linux/ieee80211.h
+++ b/include/linux/ieee80211.h
@@ -1612,6 +1612,12 @@ struct ieee80211_mgmt {
u8 action_code;
u8 variable[];
} __packed epcs;
+ struct {
+ u8 action_code;
+ u8 dialog_token;
+ u8 control;
+ u8 variable[];
+ } __packed eml_omn;
} u;
} __packed action;
DECLARE_FLEX_ARRAY(u8, body); /* Generic frame body */
@@ -5462,6 +5468,17 @@ struct ieee80211_mle_tdls_common_info {
/* no fixed fields in PRIO_ACCESS */
+#define IEEE80211_EML_CTRL_EMLSR_MODE BIT(0)
+#define IEEE80211_EML_CTRL_EMLMR_MODE BIT(1)
+#define IEEE80211_EML_CTRL_EMLSR_PARAM_UPDATE BIT(2)
+#define IEEE80211_EML_CTRL_INDEV_COEX_ACT BIT(3)
+
+#define IEEE80211_EML_EMLSR_PAD_DELAY 0x07
+#define IEEE80211_EML_EMLSR_TRANS_DELAY 0x38
+
+#define IEEE80211_EML_EMLMR_RX_MCS_MAP 0xf0
+#define IEEE80211_EML_EMLMR_TX_MCS_MAP 0x0f
+
/**
* ieee80211_mle_common_size - check multi-link element common size
* @data: multi-link element, must already be checked for size using
--- a/include/net/mac80211.h
+++ b/include/net/mac80211.h
@@ -1901,6 +1901,31 @@ enum ieee80211_offload_flags {
};
/**
+ * struct ieee80211_eml_params - EHT Operating mode notification parameters
+ *
+ * EML Operating mode notification parameters received in the Operating mode
+ * notification frame. This struct is used as a container to pass the info to
+ * the underlay driver.
+ *
+ * @link_id: the link ID where the Operating mode notification frame has been
+ * received.
+ * @control: EML control field defined in P802.11be section 9.4.1.76.
+ * @link_bitmap: eMLSR/eMLMR enabled links defined in P802.11be
+ * section 9.4.1.76.
+ * @emlmr_mcs_map_count: eMLMR number of valid mcs_map_bw fields according to
+ * P802.11be section 9.4.1.76 (valid if eMLMR mode control bit is set).
+ * @emlmr_mcs_map_bw: eMLMR supported MCS and NSS set subfileds defined in
+ * P802.11be section 9.4.1.76 (valid if eMLMR mode control bit is set).
+ */
+struct ieee80211_eml_params {
+ u8 link_id;
+ u8 control;
+ u16 link_bitmap;
+ u8 emlmr_mcs_map_count;
+ u8 emlmr_mcs_map_bw[9];
+};
+
+/**
* struct ieee80211_vif_cfg - interface configuration
* @assoc: association status
* @ibss_joined: indicates whether this station is part of an IBSS or not
@@ -4509,6 +4534,9 @@ struct ieee80211_prep_tx_info {
* interface with the specified type would be added, and thus drivers that
* implement this callback need to handle such cases. The type is the full
* &enum nl80211_iftype.
+ * @set_eml_op_mode: Configure eMLSR/eMLMR operation mode in the underlay
+ * driver according to the parameter received in the EML Operating mode
+ * notification frame.
*/
struct ieee80211_ops {
void (*tx)(struct ieee80211_hw *hw,
@@ -4904,6 +4932,10 @@ struct ieee80211_ops {
struct ieee80211_neg_ttlm *ttlm);
void (*prep_add_interface)(struct ieee80211_hw *hw,
enum nl80211_iftype type);
+ int (*set_eml_op_mode)(struct ieee80211_hw *hw,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta,
+ struct ieee80211_eml_params *eml_params);
};
/**
--- a/net/mac80211/driver-ops.h
+++ b/net/mac80211/driver-ops.h
@@ -1772,4 +1772,25 @@ drv_prep_add_interface(struct ieee80211_
trace_drv_return_void(local);
}
+static inline int drv_set_eml_op_mode(struct ieee80211_sub_if_data *sdata,
+ struct ieee80211_sta *sta,
+ struct ieee80211_eml_params *eml_params)
+{
+ struct ieee80211_local *local = sdata->local;
+ int ret = -EOPNOTSUPP;
+
+ might_sleep();
+ lockdep_assert_wiphy(local->hw.wiphy);
+
+ trace_drv_set_eml_op_mode(local, sdata, sta, eml_params->link_id,
+ eml_params->control,
+ eml_params->link_bitmap);
+ if (local->ops->set_eml_op_mode)
+ ret = local->ops->set_eml_op_mode(&local->hw, &sdata->vif,
+ sta, eml_params);
+ trace_drv_return_int(local, ret);
+
+ return ret;
+}
+
#endif /* __MAC80211_DRIVER_OPS */
--- a/net/mac80211/eht.c
+++ b/net/mac80211/eht.c
@@ -5,6 +5,7 @@
* Copyright(c) 2021-2025 Intel Corporation
*/
+#include "driver-ops.h"
#include "ieee80211_i.h"
void
@@ -102,3 +103,177 @@ ieee80211_eht_cap_ie_to_sta_eht_cap(stru
ieee80211_sta_recalc_aggregates(&link_sta->sta->sta);
}
+
+static void
+ieee80211_send_eml_op_mode_notif(struct ieee80211_sub_if_data *sdata,
+ struct ieee80211_mgmt *req, int opt_len)
+{
+ int len = offsetofend(struct ieee80211_mgmt, u.action.u.eml_omn);
+ struct ieee80211_local *local = sdata->local;
+ struct ieee80211_mgmt *mgmt;
+ struct sk_buff *skb;
+
+ len += opt_len; /* optional len */
+ skb = dev_alloc_skb(local->tx_headroom + len);
+ if (!skb)
+ return;
+
+ skb_reserve(skb, local->tx_headroom);
+ mgmt = skb_put_zero(skb, len);
+ mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
+ IEEE80211_STYPE_ACTION);
+ memcpy(mgmt->da, req->sa, ETH_ALEN);
+ memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
+ memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
+
+ mgmt->u.action.category = WLAN_CATEGORY_PROTECTED_EHT;
+ mgmt->u.action.u.eml_omn.action_code =
+ WLAN_PROTECTED_EHT_ACTION_EML_OP_MODE_NOTIF;
+ mgmt->u.action.u.eml_omn.dialog_token =
+ req->u.action.u.eml_omn.dialog_token;
+ mgmt->u.action.u.eml_omn.control = req->u.action.u.eml_omn.control &
+ ~(IEEE80211_EML_CTRL_EMLSR_PARAM_UPDATE |
+ IEEE80211_EML_CTRL_INDEV_COEX_ACT);
+ /* Copy optional fields from the received notification frame */
+ memcpy(mgmt->u.action.u.eml_omn.variable,
+ req->u.action.u.eml_omn.variable, opt_len);
+
+ ieee80211_tx_skb(sdata, skb);
+}
+
+void ieee80211_rx_eml_op_mode_notif(struct ieee80211_sub_if_data *sdata,
+ struct sk_buff *skb)
+{
+ int len = offsetofend(struct ieee80211_mgmt, u.action.u.eml_omn);
+ enum nl80211_iftype type = ieee80211_vif_type_p2p(&sdata->vif);
+ struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
+ const struct wiphy_iftype_ext_capab *ift_ext_capa;
+ struct ieee80211_mgmt *mgmt = (void *)skb->data;
+ struct ieee80211_local *local = sdata->local;
+ u8 control = mgmt->u.action.u.eml_omn.control;
+ u8 *ptr = mgmt->u.action.u.eml_omn.variable;
+ struct ieee80211_eml_params eml_params = {
+ .link_id = status->link_id,
+ };
+ struct sta_info *sta;
+ int opt_len = 0;
+
+ if (!ieee80211_vif_is_mld(&sdata->vif))
+ return;
+
+ /* eMLSR and eMLMR can't be enabled at the same time */
+ if ((control & IEEE80211_EML_CTRL_EMLSR_MODE) &&
+ (control & IEEE80211_EML_CTRL_EMLMR_MODE))
+ return;
+
+ if ((control & IEEE80211_EML_CTRL_EMLMR_MODE) &&
+ (control & IEEE80211_EML_CTRL_EMLSR_PARAM_UPDATE))
+ return;
+
+ ift_ext_capa = cfg80211_get_iftype_ext_capa(local->hw.wiphy, type);
+ if (!ift_ext_capa)
+ return;
+
+ if (!status->link_valid)
+ return;
+
+ sta = sta_info_get_bss(sdata, mgmt->sa);
+ if (!sta)
+ return;
+
+ if (control & IEEE80211_EML_CTRL_EMLSR_MODE) {
+ u8 emlsr_param_update_len;
+
+ if (!(ift_ext_capa->eml_capabilities &
+ IEEE80211_EML_CAP_EMLSR_SUPP))
+ return;
+
+ opt_len += sizeof(__le16); /* eMLSR link_bitmap */
+ /* eMLSR param update field is not part of Notfication frame
+ * sent by the AP to client so account it separately.
+ */
+ emlsr_param_update_len =
+ !!(control & IEEE80211_EML_CTRL_EMLSR_PARAM_UPDATE);
+
+ if (skb->len < len + opt_len + emlsr_param_update_len)
+ return;
+
+ if (control & IEEE80211_EML_CTRL_EMLSR_PARAM_UPDATE) {
+ u8 pad_delay, trans_delay;
+
+ pad_delay = u8_get_bits(ptr[2],
+ IEEE80211_EML_EMLSR_PAD_DELAY);
+ if (pad_delay >
+ IEEE80211_EML_CAP_EMLSR_PADDING_DELAY_256US)
+ return;
+
+ trans_delay = u8_get_bits(ptr[2],
+ IEEE80211_EML_EMLSR_TRANS_DELAY);
+ if (trans_delay >
+ IEEE80211_EML_CAP_EMLSR_TRANSITION_DELAY_256US)
+ return;
+
+ /* Update sta padding and transition delay */
+ sta->sta.eml_cap =
+ u8_replace_bits(sta->sta.eml_cap,
+ pad_delay,
+ IEEE80211_EML_CAP_EMLSR_PADDING_DELAY);
+ sta->sta.eml_cap =
+ u8_replace_bits(sta->sta.eml_cap,
+ trans_delay,
+ IEEE80211_EML_CAP_EMLSR_TRANSITION_DELAY);
+ }
+ }
+
+ if (control & IEEE80211_EML_CTRL_EMLMR_MODE) {
+ u8 mcs_map_size;
+ int i;
+
+ if (!(ift_ext_capa->eml_capabilities &
+ IEEE80211_EML_CAP_EMLMR_SUPPORT))
+ return;
+
+ opt_len += sizeof(__le16); /* eMLMR link_bitmap */
+ opt_len++; /* eMLMR mcs_map_count */
+ if (skb->len < len + opt_len)
+ return;
+
+ eml_params.emlmr_mcs_map_count = ptr[2];
+ if (eml_params.emlmr_mcs_map_count > 2)
+ return;
+
+ mcs_map_size = 3 * (1 + eml_params.emlmr_mcs_map_count);
+ opt_len += mcs_map_size;
+ if (skb->len < len + opt_len)
+ return;
+
+ for (i = 0; i < mcs_map_size; i++) {
+ u8 rx_mcs, tx_mcs;
+
+ rx_mcs = u8_get_bits(ptr[3 + i],
+ IEEE80211_EML_EMLMR_RX_MCS_MAP);
+ if (rx_mcs > 8)
+ return;
+
+ tx_mcs = u8_get_bits(ptr[3 + i],
+ IEEE80211_EML_EMLMR_TX_MCS_MAP);
+ if (tx_mcs > 8)
+ return;
+ }
+
+ memcpy(eml_params.emlmr_mcs_map_bw, &ptr[3], mcs_map_size);
+ }
+
+ if ((control & IEEE80211_EML_CTRL_EMLSR_MODE) ||
+ (control & IEEE80211_EML_CTRL_EMLMR_MODE)) {
+ eml_params.link_bitmap = get_unaligned_le16(ptr);
+ if ((eml_params.link_bitmap & sdata->vif.active_links) !=
+ eml_params.link_bitmap)
+ return;
+ }
+
+ if (drv_set_eml_op_mode(sdata, &sta->sta, &eml_params))
+ return;
+
+ ieee80211_send_eml_op_mode_notif(sdata, mgmt, opt_len);
+}
--- a/net/mac80211/ieee80211_i.h
+++ b/net/mac80211/ieee80211_i.h
@@ -2859,6 +2859,8 @@ void ieee80211_destroy_frag_cache(struct
u8 ieee80211_ie_len_eht_cap(struct ieee80211_sub_if_data *sdata);
+void ieee80211_rx_eml_op_mode_notif(struct ieee80211_sub_if_data *sdata,
+ struct sk_buff *skb);
void
ieee80211_eht_cap_ie_to_sta_eht_cap(struct ieee80211_sub_if_data *sdata,
struct ieee80211_supported_band *sband,
--- a/net/mac80211/iface.c
+++ b/net/mac80211/iface.c
@@ -1630,7 +1630,15 @@ static void ieee80211_iface_process_skb(
}
} else if (ieee80211_is_action(mgmt->frame_control) &&
mgmt->u.action.category == WLAN_CATEGORY_PROTECTED_EHT) {
- if (sdata->vif.type == NL80211_IFTYPE_STATION) {
+ if (sdata->vif.type == NL80211_IFTYPE_AP) {
+ switch (mgmt->u.action.u.eml_omn.action_code) {
+ case WLAN_PROTECTED_EHT_ACTION_EML_OP_MODE_NOTIF:
+ ieee80211_rx_eml_op_mode_notif(sdata, skb);
+ break;
+ default:
+ break;
+ }
+ } else if (sdata->vif.type == NL80211_IFTYPE_STATION) {
switch (mgmt->u.action.u.ttlm_req.action_code) {
case WLAN_PROTECTED_EHT_ACTION_TTLM_REQ:
ieee80211_process_neg_ttlm_req(sdata, mgmt,
--- a/net/mac80211/rx.c
+++ b/net/mac80211/rx.c
@@ -3834,6 +3834,14 @@ ieee80211_rx_h_action(struct ieee80211_r
u.action.u.epcs))
goto invalid;
goto queue;
+ case WLAN_PROTECTED_EHT_ACTION_EML_OP_MODE_NOTIF:
+ if (sdata->vif.type != NL80211_IFTYPE_AP)
+ break;
+
+ if (len < offsetofend(typeof(*mgmt),
+ u.action.u.eml_omn))
+ goto invalid;
+ goto queue;
default:
break;
}
--- a/net/mac80211/trace.h
+++ b/net/mac80211/trace.h
@@ -3359,6 +3359,38 @@ TRACE_EVENT(drv_prep_add_interface,
)
);
+TRACE_EVENT(drv_set_eml_op_mode,
+ TP_PROTO(struct ieee80211_local *local,
+ struct ieee80211_sub_if_data *sdata,
+ struct ieee80211_sta *sta,
+ unsigned int link_id,
+ u8 control, u16 link_bitmap),
+
+ TP_ARGS(local, sdata, sta, link_id, control, link_bitmap),
+
+ TP_STRUCT__entry(LOCAL_ENTRY
+ VIF_ENTRY
+ STA_ENTRY
+ __field(u32, link_id)
+ __field(u8, control)
+ __field(u16, link_bitmap)),
+
+ TP_fast_assign(LOCAL_ASSIGN;
+ VIF_ASSIGN;
+ STA_NAMED_ASSIGN(sta);
+ __entry->link_id = link_id;
+ __entry->control = control;
+ __entry->link_bitmap = link_bitmap;
+ ),
+
+ TP_printk(
+ LOCAL_PR_FMT VIF_PR_FMT STA_PR_FMT
+ " (link:%d control:%02x link_bitmap:%04x)",
+ LOCAL_PR_ARG, VIF_PR_ARG, STA_PR_ARG, __entry->link_id,
+ __entry->control, __entry->link_bitmap
+ )
+);
+
#endif /* !__MAC80211_DRIVER_TRACE || TRACE_HEADER_MULTI_READ */
#undef TRACE_INCLUDE_PATH
--- /dev/null
+++ b/include/linux/ieee80211-eht.h
@@ -0,0 +1 @@
+#include <linux/ieee80211.h>

View File

@@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
PKG_SOURCE_DATE:=2026-02-15
PKG_SOURCE_VERSION:=c6122254eb7003377b67a6ad14d284b69725bbee
PKG_MIRROR_HASH:=feb62dba4dfecba1e3e758e5e4e822e9776b4104ee133dccfc3feb7ae6c5182d
PKG_SOURCE_DATE:=2026-02-23
PKG_SOURCE_VERSION:=299a51f0c3011ca98a3f06cd29d50c2e1f86e348
PKG_MIRROR_HASH:=2e446a908b3be6655744330594a500428f8663b25d50d834b6d6a74d04591c5d
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=GPL-2.0

View File

@@ -0,0 +1,34 @@
From 6c1113633fde51b0e60f02243cfad1b3d09762cc Mon Sep 17 00:00:00 2001
From: Akhilesh Nema <nemaakhilesh@gmail.com>
Date: Tue, 2 Dec 2025 18:11:24 -0800
Subject: [PATCH] fix 'UINT_MAX' undeclared with build with musl libc
- utils_math.c:136:20: error: 'UINT_MAX' undeclared (first use in this function)
- tc_core.c:51:22: error: 'UINT_MAX' undeclared (first use in this function)
Signed-off-by: Akhilesh Nema <nemaakhilesh@gmail.com>
---
lib/utils_math.c | 1 +
tc/tc_core.c | 1 +
2 files changed, 2 insertions(+)
--- a/lib/utils_math.c
+++ b/lib/utils_math.c
@@ -4,6 +4,7 @@
#include <stdlib.h>
#include <string.h>
#include <math.h>
+#include <limits.h>
#include <asm/types.h>
#include "utils.h"
--- a/tc/tc_core.c
+++ b/tc/tc_core.c
@@ -11,6 +11,7 @@
#include <unistd.h>
#include <fcntl.h>
#include <math.h>
+#include <limits.h>
#include <sys/socket.h>
#include <netinet/in.h>
#include <arpa/inet.h>

View File

@@ -24,6 +24,7 @@ define Device/mikrotik_routerboard-750-r2
$(Device/mikrotik_nor)
SOC := qca9533
DEVICE_MODEL := RouterBOARD 750 r2 (hEX lite)
DEVICE_PACKAGES += -kmod-ath9k -wpad-basic-mbedtls
IMAGE_SIZE := 16256k
SUPPORTED_DEVICES += rb-750-r2
endef

View File

@@ -71,12 +71,6 @@ bcm53xx_setup_macs()
etXmacaddr=$(nvram get et0macaddr)
offset=5
;;
meraki,mx64 | \
meraki,mx64-a0 | \
meraki,mx65)
etXmacaddr=$(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 0x66)
offset=1
;;
*)
etXmacaddr=$(nvram get et0macaddr)
offset=1

View File

@@ -0,0 +1,53 @@
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-alamo.dtsi
@@ -254,11 +254,17 @@
port@0 {
label = "wan1";
reg = <0>;
+
+ nvmem-cells = <&mac_address 1>;
+ nvmem-cell-names = "mac-address";
};
port@1 {
label = "wan2";
reg = <1>;
+
+ nvmem-cells = <&mac_address 1>;
+ nvmem-cell-names = "mac-address";
};
sgmii0: port@4 {
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-kingpin.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-kingpin.dtsi
@@ -154,6 +154,9 @@
port@4 {
label = "wan";
reg = <4>;
+
+ nvmem-cells = <&mac_address 1>;
+ nvmem-cell-names = "mac-address";
};
port@8 {
--- a/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
+++ b/arch/arm/boot/dts/broadcom/bcm958625-meraki-mx6x-common.dtsi
@@ -39,7 +39,7 @@
&amac2 {
status = "okay";
- nvmem-cells = <&mac_address>;
+ nvmem-cells = <&mac_address 0>;
nvmem-cell-names = "mac-address";
};
@@ -62,7 +62,9 @@
#size-cells = <1>;
mac_address: mac-address@66 {
+ compatible = "mac-base";
reg = <0x66 0x6>;
+ #nvmem-cell-cells = <1>;
};
};
};

View File

@@ -138,7 +138,8 @@ main() {
code_openwrt=30
code_factory=31
;;
dasan,h660gm-a)
dasan,h660gm-a-airtel|\
dasan,h660gm-a-generic)
# bootflag stored in dzs partition at offset 0x49
part=$(part_named '"dzs"')
offset_blocks=0

View File

@@ -0,0 +1,70 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "en7528_dasan_h660gm-a.dtsi"
/ {
model = "DASAN H660GM-A (Airtel)";
compatible = "dasan,h660gm-a-airtel", "econet,en7528";
leds {
led_wps: wps {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WPS;
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
led_lan1: lan1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
};
led_lan2: lan2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
};
led_lan3: lan3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
};
led_lan4: lan4 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
};
};
&partitions {
partition@60c0000 {
label = "unknown";
reg = <0x60c0000 0x7d00000>;
};
partition@ddc0000 {
label = "reservearea";
reg = <0xddc0000 0x240000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_reservearea_40000: eeprom@40000 {
reg = <0x40000 0x400>;
};
eeprom_reservearea_1c0000: eeprom@1c0000 {
reg = <0x1c0000 0x1000>;
};
};
};
};

View File

@@ -0,0 +1,101 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "en7528_dasan_h660gm-a.dtsi"
/ {
model = "DASAN H660GM-A (Generic)";
compatible = "dasan,h660gm-a-generic", "econet,en7528";
keys {
key-wlan {
label = "wlan";
gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
leds {
led_usb: usb {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_USB;
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
led-lan1-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
led-lan1-amber {
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
};
led-lan2-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
};
led-lan2-amber {
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
led-lan3-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
};
led-lan3-amber {
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
};
led-lan4-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
};
led-lan4-amber {
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
};
};
};
&partitions {
partition@6dc0000 {
label = "reservearea";
reg = <0x6dc0000 0x240000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_reservearea_40000: eeprom@40000 {
reg = <0x40000 0x400>;
};
eeprom_reservearea_1c0000: eeprom@1c0000 {
reg = <0x1c0000 0x1000>;
};
};
};
};

View File

@@ -1,5 +1,4 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/dts-v1/;
#include "en7528.dtsi"
@@ -8,9 +7,6 @@
#include <dt-bindings/leds/common.h>
/ {
model = "DASAN H660GM-A";
compatible = "dasan,h660gm-a", "econet,en7528";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
@@ -66,40 +62,6 @@
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
};
led_wps: wps {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WPS;
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
led_lan1: lan1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
};
led_lan2: lan2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
};
led_lan3: lan3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
};
led_lan4: lan4 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
};
led_wlan24: wlan2g {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN_2GHZ;
@@ -186,7 +148,7 @@
econet,bmt;
econet,bbt-table-size = <250>;
partitions {
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@@ -239,28 +201,5 @@
label = "rwfs";
reg = <0x40c0000 0x2000000>;
};
partition@60c0000 {
label = "unknown";
reg = <0x60c0000 0x7d00000>;
};
partition@ddc0000 {
label = "reservearea";
reg = <0xddc0000 0x240000>;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_reservearea_40000: eeprom@40000 {
reg = <0x40000 0x400>;
};
eeprom_reservearea_1c0000: eeprom@1c0000 {
reg = <0x1c0000 0x1000>;
};
};
};
};
};

View File

@@ -10,10 +10,22 @@ TARGET_DEVICES += en7528_generic
define Device/dasan_h660gm-a
DEVICE_VENDOR := DASAN
DEVICE_MODEL := H660GM-A
DEVICE_DTS := en7528_dasan_h660gm-a
DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap
TRX_MODEL := Dewberry
IMAGES := tclinux.trx
IMAGE/tclinux.trx := append-kernel | lzma | tclinux-trx
endef
TARGET_DEVICES += dasan_h660gm-a
define Device/dasan_h660gm-a-airtel
$(Device/dasan_h660gm-a)
DEVICE_VARIANT := Airtel
DEVICE_DTS := en7528_dasan_h660gm-a-airtel
endef
TARGET_DEVICES += dasan_h660gm-a-airtel
define Device/dasan_h660gm-a-generic
$(Device/dasan_h660gm-a)
DEVICE_VARIANT := Generic
DEVICE_DTS := en7528_dasan_h660gm-a-generic
endef
TARGET_DEVICES += dasan_h660gm-a-generic

View File

@@ -0,0 +1,116 @@
From 5225349f1e750dfd107a4c5dc97d91fa212dc1ed Mon Sep 17 00:00:00 2001
From: Andrew Lunn <andrew@lunn.ch>
Date: Sat, 21 Feb 2026 14:51:54 -0600
Subject: [PATCH] net: phy: register phy led_triggers during probe to avoid
AB-BA deadlock
There is an AB-BA deadlock when both LEDS_TRIGGER_NETDEV and
LED_TRIGGER_PHY are enabled:
[ 1362.049207] [<8054e4b8>] led_trigger_register+0x5c/0x1fc <-- Trying to get lock "triggers_list_lock" via down_write(&triggers_list_lock);
[ 1362.054536] [<80662830>] phy_led_triggers_register+0xd0/0x234
[ 1362.060329] [<8065e200>] phy_attach_direct+0x33c/0x40c
[ 1362.065489] [<80651fc4>] phylink_fwnode_phy_connect+0x15c/0x23c
[ 1362.071480] [<8066ee18>] mtk_open+0x7c/0xba0
[ 1362.075849] [<806d714c>] __dev_open+0x280/0x2b0
[ 1362.080384] [<806d7668>] __dev_change_flags+0x244/0x24c
[ 1362.085598] [<806d7698>] dev_change_flags+0x28/0x78
[ 1362.090528] [<807150e4>] dev_ioctl+0x4c0/0x654 <-- Hold lock "rtnl_mutex" by calling rtnl_lock();
[ 1362.094985] [<80694360>] sock_ioctl+0x2f4/0x4e0
[ 1362.099567] [<802e9c4c>] sys_ioctl+0x32c/0xd8c
[ 1362.104022] [<80014504>] syscall_common+0x34/0x58
Here LED_TRIGGER_PHY is registering LED triggers during phy_attach
while holding RTNL and then taking triggers_list_lock.
[ 1362.191101] [<806c2640>] register_netdevice_notifier+0x60/0x168 <-- Trying to get lock "rtnl_mutex" via rtnl_lock();
[ 1362.197073] [<805504ac>] netdev_trig_activate+0x194/0x1e4
[ 1362.202490] [<8054e28c>] led_trigger_set+0x1d4/0x360 <-- Hold lock "triggers_list_lock" by down_read(&triggers_list_lock);
[ 1362.207511] [<8054eb38>] led_trigger_write+0xd8/0x14c
[ 1362.212566] [<80381d98>] sysfs_kf_bin_write+0x80/0xbc
[ 1362.217688] [<8037fcd8>] kernfs_fop_write_iter+0x17c/0x28c
[ 1362.223174] [<802cbd70>] vfs_write+0x21c/0x3c4
[ 1362.227712] [<802cc0c4>] ksys_write+0x78/0x12c
[ 1362.232164] [<80014504>] syscall_common+0x34/0x58
Here LEDS_TRIGGER_NETDEV is being enabled on an LED. It first takes
triggers_list_lock and then RTNL. A classical AB-BA deadlock.
phy_led_triggers_registers() does not require the RTNL, it does not
make any calls into the network stack which require protection. There
is also no requirement the PHY has been attached to a MAC, the
triggers only make use of phydev state. This allows the call to
phy_led_triggers_registers() to be placed elsewhere. PHY probe() and
release() don't hold RTNL, so solving the AB-BA deadlock.
Reported-by: Shiji Yang <yangshiji66@outlook.com>
Closes: https://lore.kernel.org/all/OS7PR01MB13602B128BA1AD3FA38B6D1FFBC69A@OS7PR01MB13602.jpnprd01.prod.outlook.com/
Fixes: 06f502f57d0d ("leds: trigger: Introduce a NETDEV trigger")
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/phy/phy_device.c | 25 +++++++++++++++++--------
1 file changed, 17 insertions(+), 8 deletions(-)
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1684,8 +1684,6 @@ int phy_attach_direct(struct net_device
goto error;
phy_resume(phydev);
- if (!phydev->is_on_sfp_module)
- phy_led_triggers_register(phydev);
/**
* If the external phy used by current mac interface is managed by
@@ -2058,9 +2056,6 @@ void phy_detach(struct phy_device *phyde
}
phydev->phylink = NULL;
- if (!phydev->is_on_sfp_module)
- phy_led_triggers_unregister(phydev);
-
if (phydev->mdio.dev.driver)
module_put(phydev->mdio.dev.driver->owner);
@@ -3691,17 +3686,28 @@ static int phy_probe(struct device *dev)
/* Set the state to READY by default */
phydev->state = PHY_READY;
+ /* Register the PHY LED triggers */
+ if (!phydev->is_on_sfp_module)
+ phy_led_triggers_register(phydev);
+
/* Get the LEDs from the device tree, and instantiate standard
* LEDs for them.
*/
if (IS_ENABLED(CONFIG_PHYLIB_LEDS) && !phy_driver_is_genphy(phydev) &&
- !phy_driver_is_genphy_10g(phydev))
+ !phy_driver_is_genphy_10g(phydev)) {
err = of_phy_leds(phydev);
+ if (err)
+ goto out;
+ }
+
+ return 0;
out:
+ if (!phydev->is_on_sfp_module)
+ phy_led_triggers_unregister(phydev);
+
/* Re-assert the reset signal on error */
- if (err)
- phy_device_reset(phydev, 1);
+ phy_device_reset(phydev, 1);
return err;
}
@@ -3716,6 +3722,9 @@ static int phy_remove(struct device *dev
!phy_driver_is_genphy_10g(phydev))
phy_leds_unregister(phydev);
+ if (!phydev->is_on_sfp_module)
+ phy_led_triggers_unregister(phydev);
+
phydev->state = PHY_DOWN;
sfp_bus_del_upstream(phydev->sfp_bus);

View File

@@ -102,11 +102,6 @@ CONFIG_MFD_ROHM_BD718XX=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_NEED_SG_DMA_LENGTH=y
# CONFIG_NET_DSA_MICROCHIP_KSZ8863_SMI is not set
CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C=y
CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON=y
# CONFIG_NET_DSA_MICROCHIP_KSZ_SPI is not set
CONFIG_NET_DSA_TAG_KSZ=y
CONFIG_NOP_USB_XCEIV=y
CONFIG_PARTITION_PERCPU=y
CONFIG_PCI=y

View File

@@ -70,7 +70,8 @@ define Device/gateworks_venice
kmod-hwmon-gsc kmod-rtc-ds1672 kmod-eeprom-at24 \
kmod-gpio-button-hotplug kmod-leds-gpio kmod-pps-gpio \
kmod-lan743x kmod-sky2 kmod-iio-st_accel-i2c \
kmod-can kmod-can-flexcan kmod-can-mcp251x
kmod-can kmod-can-flexcan kmod-can-mcp251x \
kmod-dsa-ksz9477-i2c
IMAGES := img.gz
IMAGE/img.gz := boot-scr | boot-img-ext4 | sdcard-img-ext4 | gzip | append-metadata
endef

View File

@@ -222,17 +222,6 @@ ipq40xx_setup_macs()
wan_mac=$(get_mac_label)
lan_mac=$(macaddr_add "$wan_mac" 1)
;;
linksys,ea6350v3|\
linksys,ea8300|\
linksys,mr6350|\
linksys,mr8300)
wan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
lan_mac=$(macaddr_add "$wan_mac" 1)
;;
linksys,whw03)
wan_mac=$(mmc_get_mac_ascii devinfo hw_mac_addr)
lan_mac="$wan_mac"
;;
mikrotik,cap-ac|\
mikrotik,hap-ac2|\
mikrotik,hap-ac3|\

View File

@@ -20,17 +20,6 @@ case "$FIRMWARE" in
/usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \
/usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1")
;;
linksys,ea8300|\
linksys,mr6350|\
linksys,mr8300)
caldata_extract "ART" 0x9000 0x2f20
# OEM assigns 4 sequential MACs
ath10k_patch_mac $(macaddr_setbit_la $(macaddr_add "$(cat /sys/class/net/eth0/address)" 4))
;;
linksys,whw03)
caldata_extract_mmc "0:ART" 0x9000 0x2f20
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 3)
;;
netgear,rbr40|\
netgear,rbs40|\
netgear,rbr50|\
@@ -88,16 +77,6 @@ case "$FIRMWARE" in
caldata_extract "ART" 0x1000 0x2f20
ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR0)
;;
linksys,ea8300|\
linksys,mr6350|\
linksys,mr8300)
caldata_extract "ART" 0x1000 0x2f20
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
;;
linksys,whw03)
caldata_extract_mmc "0:ART" 0x1000 0x2f20
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 1)
;;
mikrotik,cap-ac|\
mikrotik,hap-ac2|\
mikrotik,hap-ac3|\
@@ -180,16 +159,6 @@ case "$FIRMWARE" in
caldata_extract "ART" 0x5000 0x2f20
ath10k_patch_mac $(mtd_get_mac_ascii CFG1 RADIOADDR1)
;;
linksys,ea8300|\
linksys,mr6350|\
linksys,mr8300)
caldata_extract "ART" 0x5000 0x2f20
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 3)
;;
linksys,whw03)
caldata_extract_mmc "0:ART" 0x5000 0x2f20
ath10k_patch_mac $(macaddr_add "$(cat /sys/class/net/eth0/address)" 2)
;;
mikrotik,cap-ac|\
mikrotik,hap-ac2|\
mikrotik,hap-ac3|\

View File

@@ -19,19 +19,6 @@ preinit_set_mac_address() {
extreme-networks,ws-ap391x)
ip link set dev eth0 address $(mtd_get_mac_ascii CFG1 ethaddr)
;;
linksys,ea8300|\
linksys,mr6350|\
linksys,mr8300)
base_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
ip link set dev lan1 address $(macaddr_add "$base_mac" 1)
ip link set dev eth0 address $(macaddr_setbit "$base_mac" 7)
;;
linksys,whw03)
base_mac=$(mmc_get_mac_ascii devinfo hw_mac_addr)
ip link set dev eth0 address "$base_mac"
ip link set dev lan address "$base_mac"
ip link set dev wan address "$base_mac"
;;
mikrotik,wap-ac|\
mikrotik,wap-ac-lte|\
mikrotik,wap-r-ac)

View File

@@ -331,6 +331,7 @@ CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_LAYOUT_ASCII_ENV=y
CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y
CONFIG_NVMEM_QCOM_QFPROM=y
# CONFIG_NVMEM_QCOM_SEC_QFPROM is not set

View File

@@ -93,11 +93,8 @@
qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
};
&pcie_bridge0 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
ieee80211-freq-limit = <5490000 5835000>;
qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
};
&wifi2 {
status = "okay";
ieee80211-freq-limit = <5490000 5835000>;
qcom,ath10k-calibration-variant = "linksys-ea8300-fcc";
};

View File

@@ -18,7 +18,7 @@
// Top panel LEDs, above Linksys logo
leds {
compatible = "gpio-leds";
led_blue: led-blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
@@ -64,7 +64,7 @@
reset-delay-us = <2000>;
reset-post-delay-us = <5000>;
};
&tlmm {
status = "okay";

View File

@@ -79,11 +79,8 @@
qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc";
};
&pcie_bridge0 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
ieee80211-freq-limit = <5490000 5835000>;
qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc";
};
&wifi2 {
status = "okay";
ieee80211-freq-limit = <5490000 5835000>;
qcom,ath10k-calibration-variant = "linksys-mr8300-v0-fcc";
};

View File

@@ -54,14 +54,72 @@
sd-ldo-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
vqmmc-supply = <&vqmmc>;
card@0 {
compatible = "mmc-card";
reg = <0>;
block {
compatible = "block-device";
partitions {
block-partition-art {
partname = "art";
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
precal_art_1000: pre-calibration@1000 {
reg = <0x1000 0x2f20>;
};
precal_art_5000: pre-calibration@5000 {
reg = <0x5000 0x2f20>;
};
precal_art_9000: pre-calibration@9000 {
reg = <0x9000 0x2f20>;
};
};
};
block-partition-devinfo {
partname = "devinfo";
nvmem-layout {
compatible = "ascii-eq-delim-env";
#address-cells = <1>;
#size-cells = <1>;
hw_mac_addr: hw_mac_addr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
};
};
};
};
};
};
&gmac {
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
&wifi0 {
qcom,ath10k-calibration-variant = "linksys-whw03";
nvmem-cells = <&precal_art_1000>, <&hw_mac_addr 1>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
&wifi1 {
qcom,ath10k-calibration-variant = "linksys-whw03";
nvmem-cells = <&precal_art_5000>, <&hw_mac_addr 2>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
&pcie_bridge0 {
@@ -70,5 +128,7 @@
reg = <0x00010000 0 0 0 0>;
ieee80211-freq-limit = <5490000 5835000>;
qcom,ath10k-calibration-variant = "linksys-whw03";
nvmem-cells = <&precal_art_9000>, <&hw_mac_addr 3>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};

View File

@@ -8,7 +8,6 @@
/ {
aliases {
ethernet0 = &gmac;
led-boot = &led_blue;
led-failsafe = &led_red;
led-running = &led_blue;

View File

@@ -25,12 +25,6 @@
bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro";
};
aliases {
// TODO: Verify if the ethernet0 alias is needed
ethernet0 = &gmac;
};
soc {
tcsr@1949000 {
compatible = "qcom,tcsr";
@@ -141,6 +135,24 @@
label = "ART";
reg = <0x400000 0x80000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
precal_art_1000: pre-calibration@1000 {
reg = <0x1000 0x2f20>;
};
precal_art_5000: pre-calibration@5000 {
reg = <0x5000 0x2f20>;
};
precal_art_9000: pre-calibration@9000 {
reg = <0x9000 0x2f20>;
};
};
};
partition@480000 {
@@ -165,6 +177,17 @@
label = "devinfo";
reg = <0x740000 0x40000>;
read-only;
nvmem-layout {
compatible = "ascii-eq-delim-env";
#address-cells = <1>;
#size-cells = <1>;
hw_mac_addr: hw_mac_addr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
};
};
partition@780000 {
@@ -291,6 +314,9 @@
&gmac {
status = "okay";
nvmem-cells = <&hw_mac_addr 1>;
nvmem-cell-names = "mac-address";
};
&switch {
@@ -315,4 +341,28 @@
&swport5 {
status = "okay";
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
&wifi0 {
nvmem-cells = <&precal_art_1000>, <&hw_mac_addr 2>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
&wifi1 {
nvmem-cells = <&precal_art_5000>, <&hw_mac_addr 3>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
&pcie_bridge0 {
wifi2: wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_art_9000>, <&hw_mac_addr 4>;
nvmem-cell-names = "pre-calibration", "mac-address";
status = "disabled";
};
};

View File

@@ -85,8 +85,7 @@ ipq806x_setup_macs()
hw_mac_addr=$(mtd_get_mac_ascii hwconfig HW.WAN.MAC.Address)
ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 1)"
;;
linksys,e8350-v1|\
zyxel,nbg6817)
linksys,e8350-v1)
hw_mac_addr=$(mtd_get_mac_ascii 0:appsblenv ethaddr)
ucidef_set_interface_macaddr "lan" "$(macaddr_add $hw_mac_addr 2)"
ucidef_set_interface_macaddr "wan" "$(macaddr_add $hw_mac_addr 3)"

View File

@@ -47,14 +47,6 @@ case "$FIRMWARE" in
CI_UBIPART=art
caldata_extract_ubi "ART" 0x1000 0x2f20
;;
nokia,ac400i)
caldata_extract "0:art" 0x1000 0x2f20
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:appsblenv ethaddr) +2)
;;
zyxel,nbg6817)
caldata_extract "0:art" 0x1000 0x2f20
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:appsblenv ethaddr) 1)
;;
esac
;;
"ath10k/cal-pci-0001:01:00.0.bin")
@@ -78,14 +70,6 @@ case "$FIRMWARE" in
CI_UBIPART=art
caldata_extract_ubi "ART" 0x5000 0x2f20
;;
nokia,ac400i)
caldata_extract "0:art" 0x5000 0x2f20
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_ascii 0:appsblenv ethaddr) +3)
;;
zyxel,nbg6817)
caldata_extract "0:art" 0x5000 0x2f20
ath10k_patch_mac $(mtd_get_mac_ascii 0:appsblenv ethaddr)
;;
esac
;;
"ath10k/cal-pci-0002:01:00.0.bin")

View File

@@ -17,10 +17,6 @@ case "$board" in
[ "$PHYNBR" = "0" ] && echo $(mtd_get_mac_ascii CFG1 RADIOADDR0) > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && echo $(mtd_get_mac_ascii CFG1 RADIOADDR1) > /sys${DEVPATH}/macaddress
;;
linksys,ea7500-v1|\
linksys,ea8500)
macaddr_add $(mtd_get_mac_ascii devinfo hw_mac_addr) $(($PHYNBR + 1)) > /sys${DEVPATH}/macaddress
;;
esac
OPATH=${DEVPATH##/devices/platform/}

View File

@@ -58,8 +58,8 @@
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x10000 0 0 0 0>;
nvmem-cells = <&precal_art_1000>;
nvmem-cell-names = "pre-calibration";
nvmem-cells = <&precal_art_1000>, <&hw_mac_addr 1>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};
@@ -71,8 +71,8 @@
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x10000 0 0 0 0>;
nvmem-cells = <&precal_art_5000>;
nvmem-cell-names = "pre-calibration";
nvmem-cells = <&precal_art_5000>, <&hw_mac_addr 2>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};

View File

@@ -175,6 +175,39 @@
partitions {
compatible = "qcom,smem-part";
partition-0-art {
label = "0:art";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
precal_art_1000: pre-calibration@1000 {
reg = <0x1000 0x2f20>;
};
precal_art_5000: pre-calibration@5000 {
reg = <0x5000 0x2f20>;
};
};
};
partition-0-appsblenv {
label = "0:appsblenv";
read-only;
nvmem-layout {
compatible = "u-boot,env";
env-size = <0x40000>;
macaddr_uboot_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
};
};
};
@@ -201,6 +234,8 @@
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Nokia-AC400i";
nvmem-cells = <&precal_art_1000>, <&macaddr_uboot_ethaddr 2>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};
@@ -217,6 +252,8 @@
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "Nokia-AC400i";
nvmem-cells = <&precal_art_5000>, <&macaddr_uboot_ethaddr 3>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};

View File

@@ -228,6 +228,39 @@
partitions {
compatible = "qcom,smem-part";
partition-0-art {
label = "0:art";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
precal_art_1000: pre-calibration@1000 {
reg = <0x1000 0x2f20>;
};
precal_art_5000: pre-calibration@5000 {
reg = <0x5000 0x2f20>;
};
};
};
partition-0-appsblenv {
label = "0:appsblenv";
read-only;
nvmem-layout {
compatible = "u-boot,env";
env-size = <0x10000>;
macaddr_uboot_ethaddr: ethaddr {
#nvmem-cell-cells = <1>;
};
};
};
};
};
};
@@ -278,6 +311,24 @@
max-link-speed = <1>;
};
&pcie_bridge0 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_art_1000>, <&macaddr_uboot_ethaddr 1>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};
&pcie_bridge1 {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
nvmem-cells = <&precal_art_5000>, <&macaddr_uboot_ethaddr 0>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};
&mdio0 {
status = "okay";
@@ -399,6 +450,9 @@
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
nvmem-cells = <&macaddr_uboot_ethaddr 3>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
@@ -417,6 +471,9 @@
qcom,irq = <258>;
mdiobus = <&mdio0>;
nvmem-cells = <&macaddr_uboot_ethaddr 2>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;

View File

@@ -14,6 +14,7 @@
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &gmac0;
serial0 = &uart0;
};
@@ -212,6 +213,18 @@
label = "devinfo";
reg = <0x51c0000 0x40000>;
read-only;
nvmem-layout {
compatible = "ascii-eq-delim-env";
#address-cells = <1>;
#size-cells = <1>;
hw_mac_addr: hw_mac_addr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
};
};
partition@5200000 {
@@ -272,6 +285,16 @@
};
};
&gmac0 {
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;

View File

@@ -29,11 +29,6 @@ mediatek_setup_macs()
local board="$1"
case $board in
linksys,ea7500-v3)
lan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
wan_mac=$lan_mac
label_mac=$lan_mac
;;
netgear,ex6250-v2)
lan_mac=$(mtd_get_mac_ascii Config mac)
label_mac=$lan_mac

View File

@@ -245,6 +245,7 @@ CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=2
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_LAYOUT_ASCII_ENV=y
# CONFIG_NVMEM_LAYOUT_ADTRAN is not set
# CONFIG_NVMEM_MTK_EFUSE is not set
CONFIG_NVMEM_SYSFS=y

View File

@@ -151,7 +151,7 @@ endef
define Device/FitImage
KERNEL_SUFFIX := -uImage.itb
KERNEL = kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
KERNEL = kernel-bin | libdeflate-gzip | fit gzip $$(KDIR)/image-$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef

View File

@@ -1,5 +1,7 @@
/dts-v1/;
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -67,7 +69,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 7>;
clocks = <&sysc MT7620_CLK_TIMER>;
interrupt-parent = <&intc>;
interrupts = <1>;
@@ -77,7 +79,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 8>;
clocks = <&sysc MT7620_CLK_WATCHDOG>;
resets = <&sysc 8>;
reset-names = "wdt";
@@ -109,7 +111,7 @@
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
clocks = <&sysc 9>;
clocks = <&sysc MT7620_CLK_UART>;
resets = <&sysc 12>;
@@ -203,7 +205,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 10>;
clocks = <&sysc MT7620_CLK_I2C>;
resets = <&sysc 16>;
reset-names = "i2c";
@@ -221,7 +223,7 @@
compatible = "mediatek,mt7620-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 11>;
clocks = <&sysc MT7620_CLK_I2S>;
resets = <&sysc 17>;
reset-names = "i2s";
@@ -243,7 +245,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb00 0x40>;
clocks = <&sysc 12>;
clocks = <&sysc MT7620_CLK_SPI1>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -261,7 +263,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb40 0x60>;
clocks = <&sysc 13>;
clocks = <&sysc MT7620_CLK_SPI2>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -279,7 +281,7 @@
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 14>;
clocks = <&sysc MT7620_CLK_UARTLITE>;
resets = <&sysc 19>;
@@ -528,7 +530,7 @@
disable-wp;
no-1-8-v;
clocks = <&sysc 15>, <&sysc 15>;
clocks = <&sysc MT7620_CLK_MMC>, <&sysc MT7620_CLK_MMC>;
clock-names = "source", "hclk";
interrupt-parent = <&intc>;
@@ -630,7 +632,7 @@
compatible = "ralink,rt7620-wifi", "ralink,rt2880-wifi";
reg = <0x10180000 0x40000>;
clocks = <&sysc 16>;
clocks = <&sysc MT7620_CLK_WMAC>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

View File

@@ -1,5 +1,7 @@
/dts-v1/;
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -51,7 +53,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 7>;
clocks = <&sysc MT7620_CLK_TIMER>;
interrupt-parent = <&intc>;
interrupts = <1>;
@@ -61,7 +63,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 8>;
clocks = <&sysc MT7620_CLK_WATCHDOG>;
resets = <&sysc 8>;
reset-names = "wdt";
@@ -171,7 +173,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 10>;
clocks = <&sysc MT7620_CLK_I2C>;
resets = <&sysc 16>;
reset-names = "i2c";
@@ -189,7 +191,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb00 0x40>;
clocks = <&sysc 12>;
clocks = <&sysc MT7620_CLK_SPI1>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -207,7 +209,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb40 0x60>;
clocks = <&sysc 13>;
clocks = <&sysc MT7620_CLK_SPI2>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -225,7 +227,7 @@
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 14>;
clocks = <&sysc MT7620_CLK_UARTLITE>;
resets = <&sysc 19>;
@@ -372,7 +374,7 @@
compatible = "ralink,rt7620-wifi", "ralink,rt2880-wifi";
reg = <0x10180000 0x40000>;
clocks = <&sysc 16>;
clocks = <&sysc MT7620_CLK_WMAC>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

View File

@@ -15,6 +15,7 @@
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &gmac0;
};
chosen {
@@ -116,6 +117,18 @@
label = "devinfo";
reg = <0x140000 0x40000>;
read-only;
nvmem-layout {
compatible = "ascii-eq-delim-env";
#address-cells = <1>;
#size-cells = <1>;
hw_mac_addr: hw_mac_addr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
};
};
partition@180000 {
@@ -155,8 +168,8 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>, <&hw_mac_addr 1>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
@@ -164,15 +177,23 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_8000>, <&hw_mac_addr 2>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
&gmac0 {
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&ethphy4>;
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
&ethphy4 {

View File

@@ -12,6 +12,7 @@
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &gmac0;
};
chosen {
@@ -130,6 +131,18 @@
label = "devinfo";
reg = <0x140000 0x40000>;
read-only;
nvmem-layout {
compatible = "ascii-eq-delim-env";
#address-cells = <1>;
#size-cells = <1>;
hw_mac_addr: hw_mac_addr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
};
};
partition@180000 {
@@ -183,8 +196,8 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>, <&hw_mac_addr 1>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
@@ -192,15 +205,23 @@
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_8000>, <&hw_mac_addr 2>;
nvmem-cell-names = "eeprom", "mac-address";
};
};
&gmac0 {
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&ethphy0>;
nvmem-cells = <&hw_mac_addr 0>;
nvmem-cell-names = "mac-address";
};
&ethphy0 {

View File

@@ -1,5 +1,7 @@
/dts-v1/;
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -108,7 +110,7 @@
compatible = "mediatek,mt7621-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 9>;
clocks = <&sysc MT76X8_CLK_I2C>;
clock-names = "i2c";
resets = <&sysc 16>;
@@ -127,7 +129,7 @@
compatible = "mediatek,mt7628-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 10>;
clocks = <&sysc MT76X8_CLK_I2S>;
resets = <&sysc 17>;
reset-names = "i2s";
@@ -149,7 +151,7 @@
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
clocks = <&sysc 11>;
clocks = <&sysc MT76X8_CLK_SPI1>;
clock-names = "spi";
resets = <&sysc 18>;
@@ -172,7 +174,7 @@
reg-io-width = <4>;
no-loopback-test;
clocks = <&sysc 13>;
clocks = <&sysc MT76X8_CLK_UART0>;
resets = <&sysc 12>;
@@ -191,7 +193,7 @@
reg-io-width = <4>;
no-loopback-test;
clocks = <&sysc 14>;
clocks = <&sysc MT76X8_CLK_UART1>;
resets = <&sysc 19>;
@@ -212,7 +214,7 @@
reg-io-width = <4>;
no-loopback-test;
clocks = <&sysc 15>;
clocks = <&sysc MT76X8_CLK_UART2>;
resets = <&sysc 20>;
@@ -389,7 +391,7 @@
disable-wp;
no-1-8-v;
clocks = <&sysc 16>, <&sysc 16>;
clocks = <&sysc MT76X8_CLK_MMC>, <&sysc MT76X8_CLK_MMC>;
clock-names = "source", "hclk";
interrupt-parent = <&intc>;
@@ -511,7 +513,7 @@
compatible = "mediatek,mt7628-wmac";
reg = <0x10300000 0x100000>;
clocks = <&sysc 17>;
clocks = <&sysc MT76X8_CLK_WMAC>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

View File

@@ -1,5 +1,7 @@
/dts-v1/;
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -49,7 +51,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 3>;
clocks = <&sysc RT2880_CLK_TIMER>;
interrupt-parent = <&intc>;
interrupts = <1>;
@@ -61,7 +63,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 4>;
clocks = <&sysc RT2880_CLK_WATCHDOG>;
};
intc: intc@200 {
@@ -142,7 +144,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 6>;
clocks = <&sysc RT2880_CLK_I2C>;
resets = <&sysc 9>;
reset-names = "i2c";
@@ -160,7 +162,7 @@
compatible = "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 7>;
clocks = <&sysc RT2880_CLK_UARTLITE>;
interrupt-parent = <&intc>;
interrupts = <8>;
@@ -219,7 +221,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&sysc 8>;
clocks = <&sysc RT2880_CLK_ETHERNET>;
resets = <&sysc 18>;
reset-names = "fe";
@@ -246,7 +248,7 @@
compatible = "ralink,rt2880-wifi";
reg = <0x480000 0x40000>;
clocks = <&sysc 9>;
clocks = <&sysc RT2880_CLK_WMAC>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

View File

@@ -1,5 +1,7 @@
/dts-v1/;
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -50,7 +52,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 3>;
clocks = <&sysc RT305X_CLK_TIMER>;
interrupt-parent = <&intc>;
interrupts = <1>;
@@ -60,7 +62,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 4>;
clocks = <&sysc RT305X_CLK_WATCHDOG>;
resets = <&sysc 8>;
reset-names = "wdt";
@@ -92,7 +94,7 @@
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
clocks = <&sysc 5>;
clocks = <&sysc RT305X_CLK_UART>;
resets = <&sysc 12>;
@@ -183,7 +185,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 6>;
clocks = <&sysc RT305X_CLK_I2C>;
resets = <&sysc 16>;
reset-names = "i2c";
@@ -201,7 +203,7 @@
compatible = "ralink,rt3050-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 7>;
clocks = <&sysc RT305X_CLK_I2S>;
resets = <&sysc 17>;
reset-names = "i2s";
@@ -224,7 +226,7 @@
resets = <&sysc 18>;
reset-names = "spi";
clocks = <&sysc 8>;
clocks = <&sysc RT305X_CLK_SPI1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -239,7 +241,7 @@
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 10>;
clocks = <&sysc RT305X_CLK_UARTLITE>;
resets = <&sysc 19>;
@@ -308,7 +310,7 @@
compatible = "ralink,rt3050-eth";
reg = <0x10100000 0x10000>;
clocks = <&sysc 11>;
clocks = <&sysc RT305X_CLK_ETHERNET>;
resets = <&sysc 21>, <&sysc 23>;
reset-names = "fe", "esw";
@@ -334,7 +336,7 @@
compatible = "ralink,rt3050-wifi", "ralink,rt2880-wifi";
reg = <0x10180000 0x40000>;
clocks = <&sysc 12>;
clocks = <&sysc RT305X_CLK_WMAC>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

View File

@@ -1,5 +1,7 @@
/dts-v1/;
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -51,7 +53,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 4>;
clocks = <&sysc RT3352_CLK_TIMER>;
interrupt-parent = <&intc>;
interrupts = <1>;
@@ -61,7 +63,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 5>;
clocks = <&sysc RT3352_CLK_WATCHDOG>;
resets = <&sysc 8>;
reset-names = "wdt";
@@ -93,7 +95,7 @@
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
clocks = <&sysc 6>;
clocks = <&sysc RT3352_CLK_UART>;
resets = <&sysc 12>;
@@ -167,7 +169,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 7>;
clocks = <&sysc RT3352_CLK_I2C>;
resets = <&sysc 16>;
reset-names = "i2c";
@@ -185,7 +187,7 @@
compatible = "ralink,rt3352-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 8>;
clocks = <&sysc RT3352_CLK_I2S>;
resets = <&sysc 17>;
reset-names = "i2s";
@@ -209,7 +211,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&sysc 9>;
clocks = <&sysc RT3352_CLK_SPI1>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -239,7 +241,7 @@
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 11>;
clocks = <&sysc RT3352_CLK_UARTLITE>;
resets = <&sysc 19>;
@@ -326,7 +328,7 @@
compatible = "ralink,rt3050-eth";
reg = <0x10100000 0x10000>;
clocks = <&sysc 12>;
clocks = <&sysc RT3352_CLK_ETHERNET>;
resets = <&sysc 21>, <&sysc 23>;
reset-names = "fe", "esw";
@@ -361,7 +363,7 @@
compatible = "ralink,rt3352-wifi", "ralink,rt2880-wifi";
reg = <0x10180000 0x40000>;
clocks = <&sysc 13>;
clocks = <&sysc RT3352_CLK_WMAC>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

View File

@@ -1,5 +1,7 @@
/dts-v1/;
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -51,7 +53,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 4>;
clocks = <&sysc RT3883_CLK_TIMER>;
interrupt-parent = <&intc>;
interrupts = <1>;
@@ -61,7 +63,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 5>;
clocks = <&sysc RT3883_CLK_WATCHDOG>;
resets = <&sysc 8>;
reset-names = "wdt";
@@ -93,7 +95,7 @@
compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
clocks = <&sysc 6>;
clocks = <&sysc RT3883_CLK_UART>;
resets = <&sysc 12>;
@@ -187,7 +189,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 7>;
clocks = <&sysc RT3883_CLK_I2C>;
resets = <&sysc 16>;
reset-names = "i2c";
@@ -205,7 +207,7 @@
compatible = "ralink,rt3883-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 8>;
clocks = <&sysc RT3883_CLK_I2S>;
resets = <&sysc 17>;
reset-names = "i2s";
@@ -229,7 +231,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&sysc 9>;
clocks = <&sysc RT3883_CLK_SPI1>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -246,7 +248,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&sysc 10>;
clocks = <&sysc RT3883_CLK_SPI2>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -261,7 +263,7 @@
compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 11>;
clocks = <&sysc RT3883_CLK_UARTLITE>;
resets = <&sysc 19>;
@@ -343,7 +345,7 @@
#size-cells = <0>;
reg = <0x10100000 0x10000>;
clocks = <&sysc 12>;
clocks = <&sysc RT3883_CLK_ETHERNET>;
resets = <&sysc 21>;
reset-names = "fe";
@@ -463,7 +465,7 @@
compatible = "ralink,rt3883-wifi", "ralink,rt2880-wifi";
reg = <0x10180000 0x40000>;
clocks = <&sysc 13>;
clocks = <&sysc RT3883_CLK_WMAC>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

View File

@@ -1,5 +1,7 @@
/dts-v1/;
#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -51,7 +53,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 4>;
clocks = <&sysc RT5350_CLK_TIMER>;
interrupt-parent = <&intc>;
interrupts = <1>;
@@ -61,7 +63,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 5>;
clocks = <&sysc RT5350_CLK_WATCHDOG>;
resets = <&sysc 8>;
reset-names = "wdt";
@@ -93,7 +95,7 @@
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
clocks = <&sysc 6>;
clocks = <&sysc RT5350_CLK_UART>;
resets = <&sysc 12>;
@@ -147,7 +149,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 7>;
clocks = <&sysc RT5350_CLK_I2C>;
resets = <&sysc 16>;
reset-names = "i2c";
@@ -165,7 +167,7 @@
compatible = "ralink,rt3352-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 8>;
clocks = <&sysc RT5350_CLK_I2S>;
resets = <&sysc 17>;
reset-names = "i2s";
@@ -187,7 +189,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb00 0x40>;
clocks = <&sysc 9>;
clocks = <&sysc RT5350_CLK_SPI1>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -205,7 +207,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb40 0x60>;
clocks = <&sysc 10>;
clocks = <&sysc RT5350_CLK_SPI2>;
resets = <&sysc 18>;
reset-names = "spi";
@@ -223,7 +225,7 @@
compatible = "ralink,rt3052-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 11>;
clocks = <&sysc RT5350_CLK_UARTLITE>;
resets = <&sysc 19>;
@@ -340,7 +342,7 @@
compatible = "ralink,rt5350-eth";
reg = <0x10100000 0x10000>;
clocks = <&sysc 12>;
clocks = <&sysc RT5350_CLK_ETHERNET>;
resets = <&sysc 21>, <&sysc 23>;
reset-names = "fe", "esw";
@@ -366,7 +368,7 @@
compatible = "ralink,rt5350-wifi", "ralink,rt2880-wifi";
reg = <0x10180000 0x40000>;
clocks = <&sysc 13>;
clocks = <&sysc RT5350_CLK_WMAC>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

View File

@@ -293,17 +293,6 @@ ramips_setup_macs()
wan_mac=$lan_mac
label_mac=$lan_mac
;;
linksys,e5600|\
linksys,ea6350-v4|\
linksys,ea7300-v1|\
linksys,ea7300-v2|\
linksys,ea7500-v2|\
linksys,ea8100-v1|\
linksys,ea8100-v2)
lan_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
wan_mac=$lan_mac
label_mac=$lan_mac
;;
belkin,rt1800|\
linksys,e7350)
lan_mac=$(mtd_get_mac_ascii Config lan_hwaddr)

View File

@@ -117,17 +117,6 @@ case "$board" in
[ "$PHYNBR" = "1" ] && \
macaddr_setbit_la "$(mtd_get_mac_binary rf-eeprom 0x4)" > /sys${DEVPATH}/macaddress
;;
linksys,e5600|\
linksys,ea6350-v4|\
linksys,ea7300-v1|\
linksys,ea7300-v2|\
linksys,ea7500-v2|\
linksys,ea8100-v1|\
linksys,ea8100-v2)
hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
[ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr 2 > /sys${DEVPATH}/macaddress
;;
belkin,rt1800|\
linksys,e7350)
hw_mac_addr=$(mtd_get_mac_ascii Config wan_hwaddr)

View File

@@ -200,6 +200,7 @@ CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_LAYOUT_ASCII_ENV=y
CONFIG_NVMEM_LAYOUT_MIKROTIK=y
CONFIG_NVMEM_LAYOUT_U_BOOT_ENV=y
CONFIG_OF=y

View File

@@ -0,0 +1,188 @@
From adb2424d0d05506c2f36fcba66101d34f7409e45 Mon Sep 17 00:00:00 2001
From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Date: Mon, 20 Jan 2025 10:21:41 +0100
Subject: [PATCH] dt-bindings: clock: add clock definitions for Ralink SoCs
Add clock missing definitions for RT2880, RT305X, RT3352, RT3383, RT5350,
MT7620 and MT76X8 Ralink SoCs. Update bindings to clarify clock depending
on these new introduced constants so consumer nodes can easily use the
correct one in DTS files matching properly what is being used in driver
code (clock IDs are implicitly used there).
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
.../bindings/clock/mediatek,mtmips-sysc.yaml | 11 +-
.../dt-bindings/clock/mediatek,mtmips-sysc.h | 130 ++++++++++++++++++
2 files changed, 140 insertions(+), 1 deletion(-)
create mode 100644 include/dt-bindings/clock/mediatek,mtmips-sysc.h
--- a/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
+++ b/Documentation/devicetree/bindings/clock/mediatek,mtmips-sysc.yaml
@@ -18,6 +18,12 @@ description: |
These SoCs have an XTAL from where the cpu clock is
provided as well as derived clocks for the bus and the peripherals.
+ Each clock is assigned an identifier and client nodes use this identifier
+ to specify the clock which they consume.
+
+ All these identifiers could be found in:
+ [1]: <include/dt-bindings/clock/mediatek,mtmips-sysc.h>.
+
properties:
compatible:
items:
@@ -38,7 +44,8 @@ properties:
'#clock-cells':
description:
- The first cell indicates the clock number.
+ The first cell indicates the clock number, see [1] for available
+ clocks.
const: 1
'#reset-cells':
@@ -56,6 +63,8 @@ additionalProperties: false
examples:
- |
+ #include <dt-bindings/clock/mediatek,mtmips-sysc.h>
+
syscon@0 {
compatible = "ralink,rt5350-sysc", "syscon";
reg = <0x0 0x100>;
--- /dev/null
+++ b/include/dt-bindings/clock/mediatek,mtmips-sysc.h
@@ -0,0 +1,130 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+ */
+
+#ifndef _DT_BINDINGS_CLK_MTMIPS_H
+#define _DT_BINDINGS_CLK_MTMIPS_H
+
+/* Ralink RT-2880 clocks */
+
+#define RT2880_CLK_XTAL 0
+#define RT2880_CLK_CPU 1
+#define RT2880_CLK_BUS 2
+#define RT2880_CLK_TIMER 3
+#define RT2880_CLK_WATCHDOG 4
+#define RT2880_CLK_UART 5
+#define RT2880_CLK_I2C 6
+#define RT2880_CLK_UARTLITE 7
+#define RT2880_CLK_ETHERNET 8
+#define RT2880_CLK_WMAC 9
+
+/* Ralink RT-305X clocks */
+
+#define RT305X_CLK_XTAL 0
+#define RT305X_CLK_CPU 1
+#define RT305X_CLK_BUS 2
+#define RT305X_CLK_TIMER 3
+#define RT305X_CLK_WATCHDOG 4
+#define RT305X_CLK_UART 5
+#define RT305X_CLK_I2C 6
+#define RT305X_CLK_I2S 7
+#define RT305X_CLK_SPI1 8
+#define RT305X_CLK_SPI2 9
+#define RT305X_CLK_UARTLITE 10
+#define RT305X_CLK_ETHERNET 11
+#define RT305X_CLK_WMAC 12
+
+/* Ralink RT-3352 clocks */
+
+#define RT3352_CLK_XTAL 0
+#define RT3352_CLK_CPU 1
+#define RT3352_CLK_PERIPH 2
+#define RT3352_CLK_BUS 3
+#define RT3352_CLK_TIMER 4
+#define RT3352_CLK_WATCHDOG 5
+#define RT3352_CLK_UART 6
+#define RT3352_CLK_I2C 7
+#define RT3352_CLK_I2S 8
+#define RT3352_CLK_SPI1 9
+#define RT3352_CLK_SPI2 10
+#define RT3352_CLK_UARTLITE 11
+#define RT3352_CLK_ETHERNET 12
+#define RT3352_CLK_WMAC 13
+
+/* Ralink RT-3883 clocks */
+
+#define RT3883_CLK_XTAL 0
+#define RT3883_CLK_CPU 1
+#define RT3883_CLK_BUS 2
+#define RT3883_CLK_PERIPH 3
+#define RT3883_CLK_TIMER 4
+#define RT3883_CLK_WATCHDOG 5
+#define RT3883_CLK_UART 6
+#define RT3883_CLK_I2C 7
+#define RT3883_CLK_I2S 8
+#define RT3883_CLK_SPI1 9
+#define RT3883_CLK_SPI2 10
+#define RT3883_CLK_UARTLITE 11
+#define RT3883_CLK_ETHERNET 12
+#define RT3883_CLK_WMAC 13
+
+/* Ralink RT-5350 clocks */
+
+#define RT5350_CLK_XTAL 0
+#define RT5350_CLK_CPU 1
+#define RT5350_CLK_BUS 2
+#define RT5350_CLK_PERIPH 3
+#define RT5350_CLK_TIMER 4
+#define RT5350_CLK_WATCHDOG 5
+#define RT5350_CLK_UART 6
+#define RT5350_CLK_I2C 7
+#define RT5350_CLK_I2S 8
+#define RT5350_CLK_SPI1 9
+#define RT5350_CLK_SPI2 10
+#define RT5350_CLK_UARTLITE 11
+#define RT5350_CLK_ETHERNET 12
+#define RT5350_CLK_WMAC 13
+
+/* Ralink MT-7620 clocks */
+
+#define MT7620_CLK_XTAL 0
+#define MT7620_CLK_PLL 1
+#define MT7620_CLK_CPU 2
+#define MT7620_CLK_PERIPH 3
+#define MT7620_CLK_BUS 4
+#define MT7620_CLK_BBPPLL 5
+#define MT7620_CLK_SDHC 6
+#define MT7620_CLK_TIMER 7
+#define MT7620_CLK_WATCHDOG 8
+#define MT7620_CLK_UART 9
+#define MT7620_CLK_I2C 10
+#define MT7620_CLK_I2S 11
+#define MT7620_CLK_SPI1 12
+#define MT7620_CLK_SPI2 13
+#define MT7620_CLK_UARTLITE 14
+#define MT7620_CLK_MMC 15
+#define MT7620_CLK_WMAC 16
+
+/* Ralink MT-76X8 clocks */
+
+#define MT76X8_CLK_XTAL 0
+#define MT76X8_CLK_CPU 1
+#define MT76X8_CLK_BBPPLL 2
+#define MT76X8_CLK_PCMI2S 3
+#define MT76X8_CLK_PERIPH 4
+#define MT76X8_CLK_BUS 5
+#define MT76X8_CLK_SDHC 6
+#define MT76X8_CLK_TIMER 7
+#define MT76X8_CLK_WATCHDOG 8
+#define MT76X8_CLK_I2C 9
+#define MT76X8_CLK_I2S 10
+#define MT76X8_CLK_SPI1 11
+#define MT76X8_CLK_SPI2 12
+#define MT76X8_CLK_UART0 13
+#define MT76X8_CLK_UART1 14
+#define MT76X8_CLK_UART2 15
+#define MT76X8_CLK_MMC 16
+#define MT76X8_CLK_WMAC 17
+
+#endif /* _DT_BINDINGS_CLK_MTMIPS_H */

View File

@@ -0,0 +1,72 @@
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Date: Sun, 26 Oct 2025 10:36:02 +0100
Subject: [PATCH] mt7620: avoid direct jal imm26 in random helper
This patch forces an indirect call (via a function pointer) on the mt7620
platform when calling the small random helpers used by the constant-folding
fast path of get_random_u32_below(). That avoids embedding a 26-bit immediate
jump target in a direct `jal` instruction, which on affected platforms can
lead to sporadic incorrect jump targets, intermittent oopses/crashes/hangs,
corrupted backtraces, or "half-written" instructions under some circumstances.
The change is targetted and conservative: it only alters code generation on
CONFIG_NET_RALINK_MT7620 builds and does not change the algorithmic behaviour
of get_random_u32_below().
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
---
a/include/linux/random.h | 36 ++++++++++++++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
--- a/include/linux/random.h
+++ b/include/linux/random.h
@@ -73,17 +73,45 @@ static inline u32 get_random_u32_below(u
BUILD_BUG_ON_MSG(!ceil, "get_random_u32_below() must take ceil > 0");
if (ceil <= 1)
return 0;
- for (;;) {
- if (ceil <= 1U << 8) {
+ if (ceil <= 1U << 8) {
+#ifdef CONFIG_NET_RALINK_MT7620
+ typedef u8 (*getrnd_t)(void);
+ volatile getrnd_t rnd_fn = (getrnd_t)get_random_u8;
+#endif
+ for (;;) {
+#ifdef CONFIG_NET_RALINK_MT7620
+ u32 mult = ceil * rnd_fn();
+#else
u32 mult = ceil * get_random_u8();
+#endif
if (likely(is_power_of_2(ceil) || (u8)mult >= (1U << 8) % ceil))
return mult >> 8;
- } else if (ceil <= 1U << 16) {
+ }
+ } else if (ceil <= 1U << 16) {
+#ifdef CONFIG_NET_RALINK_MT7620
+ typedef u16 (*getrnd_t)(void);
+ volatile getrnd_t rnd_fn = (getrnd_t)get_random_u16;
+#endif
+ for (;;) {
+#ifdef CONFIG_NET_RALINK_MT7620
+ u32 mult = ceil * rnd_fn();
+#else
u32 mult = ceil * get_random_u16();
+#endif
if (likely(is_power_of_2(ceil) || (u16)mult >= (1U << 16) % ceil))
return mult >> 16;
- } else {
+ }
+ } else {
+#ifdef CONFIG_NET_RALINK_MT7620
+ typedef u32 (*getrnd_t)(void);
+ volatile getrnd_t rnd_fn = (getrnd_t)get_random_u32;
+#endif
+ for (;;) {
+#ifdef CONFIG_NET_RALINK_MT7620
+ u64 mult = (u64)ceil * rnd_fn();
+#else
u64 mult = (u64)ceil * get_random_u32();
+#endif
if (likely(is_power_of_2(ceil) || (u32)mult >= -ceil % ceil))
return mult >> 32;
}

View File

@@ -0,0 +1,35 @@
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Date: Tue, 28 Oct 2025 22:50:41 +0100
Subject: [PATCH] mt7620: avoid direct jal imm26 in resume_user_mode_work
This patch forces an indirect call (via a function pointer) on the mt7620
platform when invoking blkcg_maybe_throttle_current() from
resume_user_mode_work(). Avoiding a direct `jal` with a 26-bit immediate
jump target prevents sporadic incorrect jump targets / intermittent oopses,
crashes or hanging behavior that can appear on affected platforms.
The change is targeted: it only alters the call site when CONFIG_NET_RALINK_MT7620
is enabled and does not change the functional behaviour of resume_user_mode_work().
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
---
a/include/linux/resume_user_mode.h | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/include/linux/resume_user_mode.h
+++ b/include/linux/resume_user_mode.h
@@ -57,7 +57,13 @@ static inline void resume_user_mode_work
#endif
mem_cgroup_handle_over_high(GFP_KERNEL);
+#ifdef CONFIG_NET_RALINK_MT7620
+ typedef void (*bmtc_t)(void);
+ volatile bmtc_t bmtc_fn = (bmtc_t)blkcg_maybe_throttle_current;
+ bmtc_fn();
+#else
blkcg_maybe_throttle_current();
+#endif
rseq_handle_notify_resume(NULL, regs);
}

View File

@@ -0,0 +1,30 @@
From: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Date: Sun, 26 Oct 2025 10:36:02 +0100
Subject: [PATCH] mt7620: conditional stack align
This patch avoids applying arch_align_stack() and PAGE_ALIGN() in the exec
path on CONFIG_NET_RALINK_MT7620 builds. Many ports (including mt7620)
implement only micro-randomization inside arch_align_stack() (random offset
< PAGE_SIZE and then align-down to small alignment). Callers that immediately
apply PAGE_ALIGN() will round that micro-offset back to the original page
boundary, so invoking arch_align_stack() then PAGE_ALIGN() is pointless and
can be avoided on the affected platform.
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
---
a/fs/exec.c | 2 ++
1 file changed, 2 insertions(+)
--- a/fs/exec.c
+++ b/fs/exec.c
@@ -750,8 +750,10 @@ int setup_arg_pages(struct linux_binprm
mm->arg_start = bprm->p - stack_shift;
bprm->p = vma->vm_end - stack_shift;
#else
+#ifndef CONFIG_NET_RALINK_MT7620
stack_top = arch_align_stack(stack_top);
stack_top = PAGE_ALIGN(stack_top);
+#endif
if (unlikely(stack_top < mmap_min_addr) ||
unlikely(vma->vm_end - vma->vm_start >= stack_top - mmap_min_addr))

View File

@@ -5,10 +5,6 @@
&mdio_aux {
status = "okay";
reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
reset-delay-us = <1000>;
reset-post-delay-us = <10000>;
gpio1: expander@0 {
compatible = "realtek,rtl8231";
reg = <0x0>;

View File

@@ -5,10 +5,6 @@
&mdio_gpio {
status = "okay";
reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
reset-delay-us = <1000>;
reset-post-delay-us = <10000>;
gpio1: expander@0 {
compatible = "realtek,rtl8231";
reg = <0x0>;

View File

@@ -8,6 +8,16 @@
model = "Zyxel GS1900-24E A1";
};
&gpio0 {
/* Shared between the main and aux MDIO busses */
mdio_reset {
gpio-hog;
gpios = <1 GPIO_ACTIVE_LOW>;
output-low;
line-name = "mdio-reset";
};
};
&mdio_bus0 {
EXTERNAL_PHY(0)
EXTERNAL_PHY(1)

View File

@@ -39,6 +39,8 @@
#define soc_w32(val, reg) writel(val, RTL_SOC_BASE + reg)
struct rtl83xx_soc_info soc_info;
EXPORT_SYMBOL(soc_info);
const void *fdt;
static char rtl_soc_name[16];

View File

@@ -1,3 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_NET_DSA_RTL83XX) += common.o dsa.o \
rtl838x.o rtl839x.o rtl930x.o rtl931x.o debugfs.o qos.o tc.o
obj-$(CONFIG_NET_DSA_RTL83XX) += rtl_otto_dsa.o
rtl_otto_dsa-objs := common.o dsa.o rtl838x.o rtl839x.o rtl930x.o rtl931x.o debugfs.o qos.o tc.o

View File

@@ -24,8 +24,6 @@
#include <asm/mach-rtl-otto/mach-rtl-otto.h>
#include "rtl838x_eth.h"
int rtl83xx_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data);
#define RTETH_OWN_CPU 1
#define RTETH_RX_RING_SIZE 128
#define RTETH_RX_RINGS 2
@@ -1366,6 +1364,23 @@ static struct phylink_pcs *rteth_mac_select_pcs(struct phylink_config *config,
return &ctrl->pcs;
}
static int rteth_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data)
{
struct dsa_switch *ds;
struct dsa_port *dp;
if (!netdev_uses_dsa(dev))
return -EOPNOTSUPP;
dp = dev->dsa_ptr;
ds = dp->ds;
if (!ds->ops->port_setup_tc)
return -EOPNOTSUPP;
return ds->ops->port_setup_tc(ds, dp->index, type, type_data);
}
static const struct net_device_ops rteth_838x_netdev_ops = {
.ndo_open = rteth_open,
.ndo_stop = rteth_stop,
@@ -1376,7 +1391,7 @@ static const struct net_device_ops rteth_838x_netdev_ops = {
.ndo_tx_timeout = rteth_tx_timeout,
.ndo_set_features = rteth_83xx_set_features,
.ndo_fix_features = rteth_fix_features,
.ndo_setup_tc = rtl83xx_setup_tc,
.ndo_setup_tc = rteth_setup_tc,
};
static const struct rteth_config rteth_838x_cfg = {
@@ -1423,7 +1438,7 @@ static const struct net_device_ops rteth_839x_netdev_ops = {
.ndo_tx_timeout = rteth_tx_timeout,
.ndo_set_features = rteth_83xx_set_features,
.ndo_fix_features = rteth_fix_features,
.ndo_setup_tc = rtl83xx_setup_tc,
.ndo_setup_tc = rteth_setup_tc,
};
static const struct rteth_config rteth_839x_cfg = {
@@ -1470,7 +1485,7 @@ static const struct net_device_ops rteth_930x_netdev_ops = {
.ndo_tx_timeout = rteth_tx_timeout,
.ndo_set_features = rteth_93xx_set_features,
.ndo_fix_features = rteth_fix_features,
.ndo_setup_tc = rtl83xx_setup_tc,
.ndo_setup_tc = rteth_setup_tc,
};
static const struct rteth_config rteth_930x_cfg = {
@@ -1520,6 +1535,7 @@ static const struct net_device_ops rteth_931x_netdev_ops = {
.ndo_tx_timeout = rteth_tx_timeout,
.ndo_set_features = rteth_93xx_set_features,
.ndo_fix_features = rteth_fix_features,
.ndo_setup_tc = rteth_setup_tc,
};
static const struct rteth_config rteth_931x_cfg = {