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toolchain/binutils: refresh patches

Browse Source 
Signed-off-by: Florian Fainelli <florian@openwrt.org>

SVN-Revision: 35812
This commit is contained in:
Florian Fainelli 2013-02-26 16:40:12 +00:00
parent bfcbabdf15
commit d417049c4a
13 changed files with 107 additions and 201 deletions
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48
toolchain/binutils/patches/2.19.1/700-avr32.patch
View File

@ -13,7 +13,7 @@
. bfd_arch_bfin, {* ADI Blackfin *}
.#define bfd_mach_bfin 1
. bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
@@ -454,6 +460,7 @@ extern const bfd_arch_info_type bfd_alph
@@ -449,6 +455,7 @@ extern const bfd_arch_info_type bfd_alph
extern const bfd_arch_info_type bfd_arc_arch;
extern const bfd_arch_info_type bfd_arm_arch;
extern const bfd_arch_info_type bfd_avr_arch;
@ -21,7 +21,7 @@
extern const bfd_arch_info_type bfd_bfin_arch;
extern const bfd_arch_info_type bfd_cr16_arch;
extern const bfd_arch_info_type bfd_cr16c_arch;
@@ -526,6 +533,7 @@ static const bfd_arch_info_type * const
@@ -520,6 +527,7 @@ static const bfd_arch_info_type * const
&bfd_arc_arch,
&bfd_arm_arch,
&bfd_avr_arch,
@ -44,7 +44,7 @@
bfd_arch_bfin, /* ADI Blackfin */
#define bfd_mach_bfin 1
bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
@@ -3748,6 +3754,88 @@ instructions */
@@ -3743,6 +3749,88 @@ instructions */
instructions */
BFD_RELOC_AVR_6_ADIW,
@ -4239,7 +4239,7 @@
cpu-bfin.lo \
cpu-cr16.lo \
cpu-cr16c.lo \
@@ -247,6 +248,7 @@ BFD32_BACKENDS = \
@@ -245,6 +246,7 @@ BFD32_BACKENDS = \
elf32-arc.lo \
elf32-arm.lo \
elf32-avr.lo \
@ -4247,7 +4247,7 @@
elf32-bfin.lo \
elf32-cr16.lo \
elf32-cr16c.lo \
@@ -1355,6 +1357,10 @@ elf32-cr16.lo: elf32-cr16.c $(INCDIR)/fi
@@ -1350,6 +1352,10 @@ elf32-cr16.lo: elf32-cr16.c $(INCDIR)/fi
$(INCDIR)/hashtab.h $(INCDIR)/libiberty.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/cr16.h $(INCDIR)/elf/reloc-macros.h elf32-target.h
@ -4268,7 +4268,7 @@
cpu-bfin.lo \
cpu-cr16.lo \
cpu-cr16c.lo \
@@ -501,6 +502,7 @@ BFD32_BACKENDS = \
@@ -499,6 +500,7 @@ BFD32_BACKENDS = \
elf32-arc.lo \
elf32-arm.lo \
elf32-avr.lo \
@ -4276,7 +4276,7 @@
elf32-bfin.lo \
elf32-cr16.lo \
elf32-cr16c.lo \
@@ -1939,6 +1941,10 @@ elf32-cr16.lo: elf32-cr16.c $(INCDIR)/fi
@@ -1934,6 +1936,10 @@ elf32-cr16.lo: elf32-cr16.c $(INCDIR)/fi
$(INCDIR)/hashtab.h $(INCDIR)/libiberty.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \
$(INCDIR)/elf/cr16.h $(INCDIR)/elf/reloc-macros.h elf32-target.h
@ -4431,7 +4431,7 @@
extern const bfd_target bfd_elf32_bfin_vec;
extern const bfd_target bfd_elf32_bfinfdpic_vec;
extern const bfd_target bfd_elf32_big_generic_vec;
@@ -898,6 +899,7 @@ static const bfd_target * const _bfd_tar
@@ -896,6 +897,7 @@ static const bfd_target * const _bfd_tar
&bfd_efi_rtdrv_ia64_vec,
#endif
&bfd_elf32_avr_vec,
@ -9652,7 +9652,7 @@
bfin*) cpu_type=bfin endian=little ;;
c4x*) cpu_type=tic4x ;;
cr16*) cpu_type=cr16 endian=little ;;
@@ -134,6 +135,9 @@ case ${generic_target} in
@@ -133,6 +134,9 @@ case ${generic_target} in
cr16-*-elf*) fmt=elf ;;
@ -9982,7 +9982,7 @@
bfin \
cr16 \
cris \
@@ -242,6 +243,7 @@ TARGET_CPU_CFILES = \
@@ -241,6 +242,7 @@ TARGET_CPU_CFILES = \
config/tc-arc.c \
config/tc-arm.c \
config/tc-avr.c \
@ -9990,7 +9990,7 @@
config/tc-bfin.c \
config/tc-cr16.c \
config/tc-cris.c \
@@ -303,6 +305,7 @@ TARGET_CPU_HFILES = \
@@ -301,6 +303,7 @@ TARGET_CPU_HFILES = \
config/tc-arc.h \
config/tc-arm.h \
config/tc-avr.h \
@ -9998,7 +9998,7 @@
config/tc-bfin.h \
config/tc-cr16.h \
config/tc-cris.h \
@@ -1075,6 +1078,11 @@ DEPTC_avr_elf = $(srcdir)/config/obj-elf
@@ -1073,6 +1076,11 @@ DEPTC_avr_elf = $(srcdir)/config/obj-elf
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-avr.h dwarf2dbg.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(INCDIR)/opcode/avr.h
@ -10010,7 +10010,7 @@
DEPTC_bfin_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h dwarf2dbg.h \
@@ -1511,6 +1519,11 @@ DEPOBJ_avr_elf = $(srcdir)/config/obj-el
@@ -1501,6 +1509,11 @@ DEPOBJ_avr_elf = $(srcdir)/config/obj-el
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-avr.h dwarf2dbg.h \
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h $(INCDIR)/aout/aout64.h
@ -10022,7 +10022,7 @@
DEPOBJ_bfin_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h dwarf2dbg.h \
@@ -1884,6 +1897,9 @@ DEP_cr16_elf = $(srcdir)/config/obj-elf.
@@ -1869,6 +1882,9 @@ DEP_cr16_elf = $(srcdir)/config/obj-elf.
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-cr16.h dwarf2dbg.h \
$(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h
@ -10042,7 +10042,7 @@
bfin \
cr16 \
cris \
@@ -489,6 +490,7 @@ TARGET_CPU_CFILES = \
@@ -488,6 +489,7 @@ TARGET_CPU_CFILES = \
config/tc-arc.c \
config/tc-arm.c \
config/tc-avr.c \
@ -10050,7 +10050,7 @@
config/tc-bfin.c \
config/tc-cr16.c \
config/tc-cris.c \
@@ -550,6 +552,7 @@ TARGET_CPU_HFILES = \
@@ -548,6 +550,7 @@ TARGET_CPU_HFILES = \
config/tc-arc.h \
config/tc-arm.h \
config/tc-avr.h \
@ -10058,7 +10058,7 @@
config/tc-bfin.h \
config/tc-cr16.h \
config/tc-cris.h \
@@ -844,6 +847,12 @@ DEPTC_avr_elf = $(srcdir)/config/obj-elf
@@ -841,6 +844,12 @@ DEPTC_avr_elf = $(srcdir)/config/obj-elf
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
$(INCDIR)/opcode/avr.h
@ -10071,7 +10071,7 @@
DEPTC_bfin_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h dwarf2dbg.h \
@@ -1359,6 +1368,12 @@ DEPOBJ_avr_elf = $(srcdir)/config/obj-el
@@ -1349,6 +1358,12 @@ DEPOBJ_avr_elf = $(srcdir)/config/obj-el
$(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \
struc-symbol.h $(INCDIR)/aout/aout64.h
@ -10084,7 +10084,7 @@
DEPOBJ_bfin_elf = $(srcdir)/config/obj-elf.h $(BFDDIR)/elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/external.h $(INCDIR)/elf/internal.h \
$(INCDIR)/bfdlink.h $(srcdir)/config/tc-bfin.h dwarf2dbg.h \
@@ -1814,6 +1829,10 @@ DEP_cr16_elf = $(srcdir)/config/obj-elf.
@@ -1799,6 +1814,10 @@ DEP_cr16_elf = $(srcdir)/config/obj-elf.
$(srcdir)/config/obj-coff.h $(INCDIR)/coff/internal.h \
$(BFDDIR)/libcoff.h
@ -18318,7 +18318,7 @@
extern int print_insn_bfin (bfd_vma, disassemble_info *);
extern int print_insn_big_arm (bfd_vma, disassemble_info *);
extern int print_insn_big_mips (bfd_vma, disassemble_info *);
@@ -293,7 +294,9 @@ extern void print_i386_disassembler_opti
@@ -292,7 +293,9 @@ extern void print_i386_disassembler_opti
extern void print_mips_disassembler_options (FILE *);
extern void print_ppc_disassembler_options (FILE *);
extern void print_arm_disassembler_options (FILE *);
@ -18978,7 +18978,7 @@
ecoff_i860.o \
ecoff_sparc.o \
eelf32_spu.o \
@@ -648,6 +695,194 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
@@ -646,6 +693,194 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
$(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
${GEN_DEPENDS}
${GENSCRIPTS} avr6 "$(tdir_avr2)"
@ -19229,7 +19229,7 @@
ecoff_i860.o \
ecoff_sparc.o \
eelf32_spu.o \
@@ -1480,6 +1527,194 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
@@ -1478,6 +1525,194 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
$(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
${GEN_DEPENDS}
${GENSCRIPTS} avr6 "$(tdir_avr2)"
@ -30605,7 +30605,7 @@
#define ARCH_bfin
#define ARCH_cr16
#define ARCH_cris
@@ -129,6 +130,11 @@ disassembler (abfd)
@@ -128,6 +129,11 @@ disassembler (abfd)
disassemble = print_insn_avr;
break;
#endif
@ -30617,7 +30617,7 @@
#ifdef ARCH_bfin
case bfd_arch_bfin:
disassemble = print_insn_bfin;
@@ -472,6 +478,9 @@ disassembler_usage (stream)
@@ -466,6 +472,9 @@ disassembler_usage (stream)
#ifdef ARCH_i386
print_i386_disassembler_options (stream);
#endif

2
toolchain/binutils/patches/2.21.1/111-pr7093.elf32-arm.c.patch
View File

@ -1,6 +1,6 @@
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -5631,6 +5631,10 @@ bfd_elf32_arm_init_maps (bfd *abfd)
@@ -5637,6 +5637,10 @@ bfd_elf32_arm_init_maps (bfd *abfd)
if (! is_arm_elf (abfd))
return;

2
toolchain/binutils/patches/2.21.1/112-arm-uclibc-gas-needs-libm.patch
View File

@ -20,7 +20,7 @@ make[4]: *** [as-new] Error 1
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -431,6 +431,12 @@ case ${generic_target} in
@@ -432,6 +432,12 @@ case ${generic_target} in
*-*-netware) fmt=elf em=netware ;;
esac

16
toolchain/binutils/patches/2.21.1/200-mips_non_pic.patch
View File

@ -57,7 +57,7 @@
/* True if NAME is the recognized name of any SHT_MIPS_OPTIONS section.
Some IRIX system files do not use MIPS_ELF_OPTIONS_SECTION_NAME. */
#define MIPS_ELF_OPTIONS_SECTION_NAME_P(NAME) \
@@ -7686,7 +7694,9 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s
@@ -7690,7 +7698,9 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s
/* We need a stub, not a plt entry for the undefined
function. But we record it as if it needs plt. See
@ -68,7 +68,7 @@
h->needs_plt = 1;
h->type = STT_FUNC;
}
@@ -7793,6 +7803,8 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s
@@ -7796,6 +7806,8 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s
case R_MIPS_32:
case R_MIPS_REL32:
case R_MIPS_64:
@ -77,7 +77,7 @@
/* In VxWorks executables, references to external symbols
are handled using copy relocs or PLT stubs, so there's
no need to add a .rela.dyn entry for this relocation. */
@@ -7848,11 +7860,21 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s
@@ -7851,11 +7863,21 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s
case R_MIPS_GPREL16:
case R_MIPS_LITERAL:
case R_MIPS_GPREL32:
@ -99,7 +99,7 @@
/* This relocation describes the C++ object vtable hierarchy.
Reconstruct it for later use during GC. */
case R_MIPS_GNU_VTINHERIT:
@@ -7875,20 +7897,20 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s
@@ -7878,20 +7900,20 @@ _bfd_mips_elf_check_relocs (bfd *abfd, s
/* We must not create a stub for a symbol that has relocations
related to taking the function's address. This doesn't apply to
@ -125,7 +125,7 @@
}
/* See if this reloc would need to refer to a MIPS16 hard-float stub,
@@ -12601,7 +12623,9 @@ _bfd_mips_elf_merge_private_bfd_data (bf
@@ -12607,7 +12629,9 @@ _bfd_mips_elf_merge_private_bfd_data (bf
break;
}
}
@ -179,7 +179,7 @@
if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, file_mips_arch))
as_warn (_("Could not set architecture and machine"));
@@ -11270,6 +11276,7 @@ enum options
@@ -11256,6 +11262,7 @@ enum options
OPTION_PDR,
OPTION_NO_PDR,
OPTION_MVXWORKS_PIC,
@ -187,7 +187,7 @@
#endif /* OBJ_ELF */
OPTION_END_OF_ENUM
};
@@ -11377,6 +11384,7 @@ struct option md_longopts[] =
@@ -11363,6 +11370,7 @@ struct option md_longopts[] =
{"mpdr", no_argument, NULL, OPTION_PDR},
{"mno-pdr", no_argument, NULL, OPTION_NO_PDR},
{"mvxworks-pic", no_argument, NULL, OPTION_MVXWORKS_PIC},
@ -195,7 +195,7 @@
#endif /* OBJ_ELF */
{NULL, no_argument, NULL, 0}
@@ -11825,6 +11833,11 @@ md_parse_option (int c, char *arg)
@@ -11811,6 +11819,11 @@ md_parse_option (int c, char *arg)
case OPTION_MVXWORKS_PIC:
mips_pic = VXWORKS_PIC;
break;

2
toolchain/binutils/patches/2.21.1/300-001_ld_makefile_patch.patch
View File

@ -11,7 +11,7 @@
EMULATION_OFILES = @EMULATION_OFILES@
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -360,7 +360,7 @@ AM_CFLAGS = $(WARN_CFLAGS)
@@ -365,7 +365,7 @@ AM_CFLAGS = $(WARN_CFLAGS)
# We put the scripts in the directory $(scriptdir)/ldscripts.
# We can't put the scripts in $(datadir) because the SEARCH_DIR
# directives need to be different for native and cross linkers.

4
toolchain/binutils/patches/2.21.1/300-012_check_ldrunpath_length.patch
View File

@ -1,6 +1,6 @@
--- a/ld/emultempl/elf32.em
+++ b/ld/emultempl/elf32.em
@@ -1270,6 +1270,8 @@ fragment <<EOF
@@ -1272,6 +1272,8 @@ fragment <<EOF
&& command_line.rpath == NULL)
{
lib_path = (const char *) getenv ("LD_RUN_PATH");
@ -9,7 +9,7 @@
if (gld${EMULATION_NAME}_search_needed (lib_path, &n,
force))
break;
@@ -1497,6 +1499,8 @@ gld${EMULATION_NAME}_before_allocation (
@@ -1499,6 +1501,8 @@ gld${EMULATION_NAME}_before_allocation (
rpath = command_line.rpath;
if (rpath == NULL)
rpath = (const char *) getenv ("LD_RUN_PATH");

201
toolchain/binutils/patches/2.21.1/700-avr32.patch
View File

@ -31,7 +31,7 @@
&bfd_cr16c_arch,
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2053,6 +2053,12 @@ enum bfd_architecture
@@ -2060,6 +2060,12 @@ enum bfd_architecture
#define bfd_mach_avr5 5
#define bfd_mach_avr51 51
#define bfd_mach_avr6 6
@ -44,7 +44,7 @@
bfd_arch_bfin, /* ADI Blackfin */
#define bfd_mach_bfin 1
bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
@@ -3989,6 +3995,88 @@ instructions */
@@ -3996,6 +4002,88 @@ instructions */
BFD_RELOC_RX_ABS16UL,
BFD_RELOC_RX_RELAX,
@ -148,7 +148,7 @@
;;
--- a/bfd/configure
+++ b/bfd/configure
@@ -15040,6 +15040,7 @@ do
@@ -15188,6 +15188,7 @@ do
bfd_pei_ia64_vec) tb="$tb pei-ia64.lo pepigen.lo cofflink.lo"; target_size=64 ;;
bfd_elf32_am33lin_vec) tb="$tb elf32-am33lin.lo elf32.lo $elf" ;;
bfd_elf32_avr_vec) tb="$tb elf32-avr.lo elf32.lo $elf" ;;
@ -158,7 +158,7 @@
bfd_elf32_big_generic_vec) tb="$tb elf32-gen.lo elf32.lo $elf" ;;
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -675,6 +675,7 @@ do
@@ -679,6 +679,7 @@ do
bfd_pei_ia64_vec) tb="$tb pei-ia64.lo pepigen.lo cofflink.lo"; target_size=64 ;;
bfd_elf32_am33lin_vec) tb="$tb elf32-am33lin.lo elf32.lo $elf" ;;
bfd_elf32_avr_vec) tb="$tb elf32-avr.lo elf32.lo $elf" ;;
@ -223,7 +223,7 @@
+ N(bfd_mach_avr32_ap, "avr32", TRUE, &cpu_info[0]);
--- /dev/null
+++ b/bfd/elf32-avr32.c
@@ -0,0 +1,3915 @@
@@ -0,0 +1,3944 @@
+/* AVR32-specific support for 32-bit ELF.
+ Copyright 2003,2004,2005,2006,2007,2008,2009 Atmel Corporation.
+
@ -578,7 +578,8 @@
+ unsigned int relax_pass;
+};
+#define avr32_elf_hash_table(p) \
+ ((struct elf_avr32_link_hash_table *)((p)->hash))
+ (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \
+ == AVR32_ELF_DATA ? ((struct elf_avr32_link_hash_table *) ((p)->hash)) : NULL)
+
+static struct bfd_hash_entry *
+avr32_elf_link_hash_newfunc(struct bfd_hash_entry *entry,
@ -640,7 +641,8 @@
+
+ if (! _bfd_elf_link_hash_table_init(&ret->root, abfd,
+ avr32_elf_link_hash_newfunc,
+ sizeof (struct elf_avr32_link_hash_entry)))
+ sizeof (struct elf_avr32_link_hash_entry),
+ AVR32_ELF_DATA))
+ {
+ free(ret);
+ return NULL;
@ -723,6 +725,9 @@
+ htab = avr32_elf_hash_table(info);
+ flags = bed->dynamic_sec_flags;
+
+ if (htab == NULL)
+ return FALSE;
+
+ if (htab->sgot)
+ return TRUE;
+
@ -760,6 +765,9 @@
+ htab = avr32_elf_hash_table(info);
+ flags = bed->dynamic_sec_flags;
+
+ if (htab == NULL)
+ return FALSE;
+
+ if (!avr32_elf_create_got_section (dynobj, info))
+ return FALSE;
+
@ -800,6 +808,9 @@
+ symtab_hdr = &elf_tdata(abfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes(abfd);
+ htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
+ local_got_ents = elf_local_got_ents(abfd);
+ sgot = htab->sgot;
+
@ -982,6 +993,9 @@
+ havr = (struct elf_avr32_link_hash_entry *)h;
+ dynobj = elf_hash_table(info)->dynobj;
+
+ if (htab == NULL)
+ return FALSE;
+
+ /* Make sure we know what is going on here. */
+ BFD_ASSERT (dynobj != NULL
+ && (h->u.weakdef != NULL
@ -1292,6 +1306,9 @@
+ htab = avr32_elf_hash_table(info);
+ havr = (struct elf_avr32_link_hash_entry *)h;
+
+ if (htab == NULL)
+ return FALSE;
+
+ got = h->got.glist;
+
+ /* If got is NULL, the symbol is never referenced through the GOT */
@ -1343,6 +1360,9 @@
+ pr_debug("(4) size dynamic sections\n");
+
+ htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
+ dynobj = htab->root.dynobj;
+ BFD_ASSERT(dynobj != NULL);
+
@ -3486,6 +3506,9 @@
+ return TRUE;
+
+ htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
+ symtab_hdr = &elf_tdata(input_bfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes(input_bfd);
+ local_got_ents = elf_local_got_ents(input_bfd);
@ -3808,6 +3831,9 @@
+ pr_debug("(7) finish dynamic symbol: %s\n", h->root.root.string);
+
+ htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
+ got = h->got.glist;
+
+ if (got && got->refcount > 0)
@ -3874,6 +3900,9 @@
+ pr_debug("(8) finish dynamic sections\n");
+
+ htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
+ sgot = htab->sgot;
+ sdyn = bfd_get_section_by_name(htab->root.dynobj, ".dynamic");
+
@ -4165,9 +4194,9 @@
+
+void bfd_elf32_avr32_set_options(struct bfd_link_info *info,
+ int direct_data_refs);
--- b/bfd/elf-bfd.h
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -406,6 +406,7 @@
@@ -402,6 +402,7 @@ enum elf_target_id
ALPHA_ELF_DATA = 1,
ARM_ELF_DATA,
AVR_ELF_DATA,
@ -4175,7 +4204,7 @@
BFIN_ELF_DATA,
CRIS_ELF_DATA,
FRV_ELF_DATA,
@@ -1553,6 +1554,10 @@
@@ -1549,6 +1550,10 @@ struct elf_obj_tdata
find_nearest_line. */
struct mips_elf_find_line *find_line_info;
@ -4409,7 +4438,7 @@
--- a/binutils/doc/binutils.info
+++ b/binutils/doc/binutils.info
@@ -1705,6 +1705,10 @@ equivalent. At least one option from th
@@ -1707,6 +1707,10 @@ equivalent. At least one option from th
useful when attempting to disassemble thumb code produced by other
compilers.
@ -4422,7 +4451,7 @@
the following may be specified as a comma separated string.
--- a/binutils/doc/binutils.texi
+++ b/binutils/doc/binutils.texi
@@ -1980,6 +1980,10 @@ using the switch @option{--disassembler-
@@ -1982,6 +1982,10 @@ using the switch @option{--disassembler-
useful when attempting to disassemble thumb code produced by other
compilers.
@ -4448,7 +4477,7 @@
following may be specified as a comma separated string.
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -95,6 +95,7 @@
@@ -96,6 +96,7 @@
#include "elf/arc.h"
#include "elf/arm.h"
#include "elf/avr.h"
@ -4456,7 +4485,7 @@
#include "elf/bfin.h"
#include "elf/cr16.h"
#include "elf/cris.h"
@@ -619,6 +620,7 @@ guess_is_rela (unsigned int e_machine)
@@ -544,6 +545,7 @@ guess_is_rela (unsigned int e_machine)
case EM_ALPHA:
case EM_ALTERA_NIOS2:
case EM_AVR:
@ -4464,7 +4493,7 @@
case EM_AVR_OLD:
case EM_BLACKFIN:
case EM_CR16:
@@ -1072,6 +1074,10 @@ dump_relocations (FILE * file,
@@ -997,6 +999,10 @@ dump_relocations (FILE * file,
rtype = elf_avr_reloc_type (type);
break;
@ -4477,7 +4506,7 @@
case EM_SPARCV9:
--- a/gas/as.c
+++ b/gas/as.c
@@ -459,10 +459,10 @@ parse_args (int * pargc, char *** pargv)
@@ -464,10 +464,10 @@ parse_args (int * pargc, char *** pargv)
the end of the preceeding line so that it is simpler to
selectively add and remove lines from this list. */
{"alternate", no_argument, NULL, OPTION_ALTERNATE}
@ -4492,7 +4521,7 @@
,{"a", optional_argument, NULL, 'a'}
/* Handle -al=<FILE>. */
,{"al", optional_argument, NULL, OPTION_AL}
@@ -839,8 +839,15 @@ This program has absolutely no warranty.
@@ -854,8 +854,15 @@ This program has absolutely no warranty.
case 'a':
if (optarg)
{
@ -9786,7 +9815,7 @@
@set CRIS
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -6865,6 +6865,9 @@ subject, see the hardware manufacturer's
@@ -6877,6 +6877,9 @@ subject, see the hardware manufacturer's
@ifset AVR
* AVR-Dependent:: AVR Dependent Features
@end ifset
@ -9796,7 +9825,7 @@
@ifset Blackfin
* Blackfin-Dependent:: Blackfin Dependent Features
@end ifset
@@ -7006,6 +7009,10 @@ subject, see the hardware manufacturer's
@@ -7018,6 +7021,10 @@ subject, see the hardware manufacturer's
@include c-avr.texi
@end ifset
@ -18299,7 +18328,7 @@
+.L2: nop
--- a/gas/write.c
+++ b/gas/write.c
@@ -2221,6 +2221,10 @@ relax_frag (segT segment, fragS *fragP,
@@ -2227,6 +2227,10 @@ relax_frag (segT segment, fragS *fragP,
#endif /* defined (TC_GENERIC_RELAX_TABLE) */
@ -18310,7 +18339,7 @@
/* Relax_align. Advance location counter to next address that has 'alignment'
lowest order bits all 0s, return size of adjustment made. */
static relax_addressT
@@ -2240,6 +2244,7 @@ relax_align (register relax_addressT add
@@ -2246,6 +2250,7 @@ relax_align (register relax_addressT add
#endif
return (new_address - address);
}
@ -18318,7 +18347,7 @@
/* Now we have a segment, not a crowd of sub-segments, we can make
fr_address values.
@@ -2286,7 +2291,7 @@ relax_segment (struct frag *segment_frag
@@ -2292,7 +2297,7 @@ relax_segment (struct frag *segment_frag
case rs_align_code:
case rs_align_test:
{
@ -18327,7 +18356,7 @@
if (fragP->fr_subtype != 0 && offset > fragP->fr_subtype)
offset = 0;
@@ -2497,10 +2502,10 @@ relax_segment (struct frag *segment_frag
@@ -2503,10 +2508,10 @@ relax_segment (struct frag *segment_frag
{
addressT oldoff, newoff;
@ -19095,7 +19124,7 @@
+LDEMUL_SET_SYMBOLS=avr32_elf_set_symbols
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -162,6 +162,53 @@ ALL_EMULATION_SOURCES = \
@@ -163,6 +163,53 @@ ALL_EMULATION_SOURCES = \
eavr5.c \
eavr51.c \
eavr6.c \
@ -19148,8 +19177,8 @@
+ eavr32linux.c \
ecoff_i860.c \
ecoff_sparc.c \
eelf32_spu.c \
@@ -760,6 +807,214 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
ecrisaout.c \
@@ -766,6 +813,214 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
$(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
${GEN_DEPENDS}
${GENSCRIPTS} avr6 "$(tdir_avr2)"
@ -19364,7 +19393,7 @@
ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
$(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"
@@ -2052,7 +2307,9 @@ install-exec-local: ld-new$(EXEEXT) inst
@@ -2059,7 +2314,9 @@ install-exec-local: ld-new$(EXEEXT) inst
fi; \
fi
@ -19377,7 +19406,7 @@
$(INSTALL_DATA) $$f $(DESTDIR)$(scriptdir)/$$f ; \
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -462,6 +462,53 @@ ALL_EMULATION_SOURCES = \
@@ -468,6 +468,53 @@ ALL_EMULATION_SOURCES = \
eavr5.c \
eavr51.c \
eavr6.c \
@ -19430,8 +19459,8 @@
+ eavr32linux.c \
ecoff_i860.c \
ecoff_sparc.c \
eelf32_spu.c \
@@ -2183,6 +2230,194 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
ecrisaout.c \
@@ -2201,6 +2248,194 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
$(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
${GEN_DEPENDS}
${GENSCRIPTS} avr6 "$(tdir_avr2)"
@ -30765,115 +30794,3 @@
#ifdef ARCH_s390
print_s390_disassembler_options (stream);
#endif
--- a/bfd/elf32-avr32.c
+++ b/bfd/elf32-avr32.c
@@ -352,7 +352,8 @@ struct elf_avr32_link_hash_table
unsigned int relax_pass;
};
#define avr32_elf_hash_table(p) \
- ((struct elf_avr32_link_hash_table *)((p)->hash))
+ (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \
+ == AVR32_ELF_DATA ? ((struct elf_avr32_link_hash_table *) ((p)->hash)) : NULL)
static struct bfd_hash_entry *
avr32_elf_link_hash_newfunc(struct bfd_hash_entry *entry,
@@ -414,7 +415,8 @@ avr32_elf_link_hash_table_create(bfd *ab
if (! _bfd_elf_link_hash_table_init(&ret->root, abfd,
avr32_elf_link_hash_newfunc,
- sizeof (struct elf_avr32_link_hash_entry)))
+ sizeof (struct elf_avr32_link_hash_entry),
+ AVR32_ELF_DATA))
{
free(ret);
return NULL;
@@ -497,6 +499,9 @@ avr32_elf_create_got_section (bfd *dynob
htab = avr32_elf_hash_table(info);
flags = bed->dynamic_sec_flags;
+ if (htab == NULL)
+ return FALSE;
+
if (htab->sgot)
return TRUE;
@@ -534,6 +539,9 @@ avr32_elf_create_dynamic_sections (bfd *
htab = avr32_elf_hash_table(info);
flags = bed->dynamic_sec_flags;
+ if (htab == NULL)
+ return FALSE;
+
if (!avr32_elf_create_got_section (dynobj, info))
return FALSE;
@@ -574,6 +582,9 @@ avr32_check_relocs (bfd *abfd, struct bf
symtab_hdr = &elf_tdata(abfd)->symtab_hdr;
sym_hashes = elf_sym_hashes(abfd);
htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
local_got_ents = elf_local_got_ents(abfd);
sgot = htab->sgot;
@@ -756,6 +767,9 @@ avr32_elf_adjust_dynamic_symbol(struct b
havr = (struct elf_avr32_link_hash_entry *)h;
dynobj = elf_hash_table(info)->dynobj;
+ if (htab == NULL)
+ return FALSE;
+
/* Make sure we know what is going on here. */
BFD_ASSERT (dynobj != NULL
&& (h->u.weakdef != NULL
@@ -1066,6 +1080,9 @@ allocate_dynrelocs(struct elf_link_hash_
htab = avr32_elf_hash_table(info);
havr = (struct elf_avr32_link_hash_entry *)h;
+ if (htab == NULL)
+ return FALSE;
+
got = h->got.glist;
/* If got is NULL, the symbol is never referenced through the GOT */
@@ -1117,6 +1134,9 @@ avr32_elf_size_dynamic_sections (bfd *ou
pr_debug("(4) size dynamic sections\n");
htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
dynobj = htab->root.dynobj;
BFD_ASSERT(dynobj != NULL);
@@ -3260,6 +3280,9 @@ avr32_elf_relocate_section(bfd *output_b
return TRUE;
htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
symtab_hdr = &elf_tdata(input_bfd)->symtab_hdr;
sym_hashes = elf_sym_hashes(input_bfd);
local_got_ents = elf_local_got_ents(input_bfd);
@@ -3582,6 +3605,9 @@ avr32_elf_finish_dynamic_symbol(bfd *out
pr_debug("(7) finish dynamic symbol: %s\n", h->root.root.string);
htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
got = h->got.glist;
if (got && got->refcount > 0)
@@ -3648,6 +3674,9 @@ avr32_elf_finish_dynamic_sections(bfd *o
pr_debug("(8) finish dynamic sections\n");
htab = avr32_elf_hash_table(info);
+ if (htab == NULL)
+ return FALSE;
+
sgot = htab->sgot;
sdyn = bfd_get_section_by_name(htab->root.dynobj, ".dynamic");

11
toolchain/binutils/patches/2.22/200-musl.patch
View File

@ -1,7 +1,6 @@
diff --git a/config.sub b/config.sub
--- a/config.sub
+++ b/config.sub
@@ -125,6 +125,7 @@
@@ -125,6 +125,7 @@ esac
maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'`
case $maybe_os in
nto-qnx* | linux-gnu* | linux-android* | linux-dietlibc | linux-newlib* | \
@ -9,11 +8,3 @@ diff --git a/config.sub b/config.sub
linux-uclibc* | uclinux-uclibc* | uclinux-gnu* | kfreebsd*-gnu* | \
knetbsd*-gnu* | netbsd*-gnu* | \
kopensolaris*-gnu* | \
@@ -1335,6 +1336,7 @@
| -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \
| -mingw32* | -linux-gnu* | -linux-android* \
| -linux-newlib* | -linux-uclibc* \
+ | -linux-musl* \
| -uxpv* | -beos* | -mpeix* | -udk* \
| -interix* | -uwin* | -mks* | -rhapsody* | -darwin* | -opened* \
| -openstep* | -oskit* | -conix* | -pw32* | -nonstopux* \

8
toolchain/binutils/patches/2.22/500-arm_ld_assert_fix.patch
View File

@ -1,9 +1,8 @@
See http://sourceware.org/bugzilla/show_bug.cgi?id=13990 for details.
---
diff -u -r1.287 -r1.288
--- a/bfd/elf32-arm.c 2012/04/24 05:12:31 1.287
+++ b/bfd/elf32-arm.c 2012/04/24 16:09:12 1.288
@@ -12256,8 +12256,19 @@
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -12046,8 +12046,19 @@ elf32_arm_gc_sweep_hook (bfd *
if (may_need_local_target_p
&& elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
{
@ -25,4 +24,3 @@ diff -u -r1.287 -r1.288
if (!call_reloc_p)
arm_plt->noncall_refcount--;

4
toolchain/binutils/patches/2.23.1/112-arm-uclibc-gas-needs-libm.patch
View File

@ -20,7 +20,7 @@ make[4]: *** [as-new] Error 1
--- a/gas/configure.tgt
+++ b/gas/configure.tgt
@@ -428,6 +428,12 @@ case ${generic_target} in
@@ -450,6 +450,12 @@ case ${generic_target} in
*-*-netware) fmt=elf em=netware ;;
esac
@ -31,5 +31,5 @@ make[4]: *** [as-new] Error 1
+esac
+
case ${cpu_type} in
alpha | arm | i386 | ia64 | microblaze | mips | ns32k | pdp11 | ppc | sparc | z80 | z8k)
aarch64 | alpha | arm | i386 | ia64 | microblaze | mips | ns32k | pdp11 | ppc | sparc | z80 | z8k)
bfd_gas=yes

4
toolchain/binutils/patches/2.23.1/120-sh-conf.patch
View File

@ -1,6 +1,6 @@
--- a/configure
+++ b/configure
@@ -3570,7 +3570,7 @@ case "${target}" in
@@ -3595,7 +3595,7 @@ case "${target}" in
mips*-*-*)
noconfigdirs="$noconfigdirs gprof"
;;
@ -11,7 +11,7 @@
;;
--- a/configure.ac
+++ b/configure.ac
@@ -1006,7 +1006,7 @@ case "${target}" in
@@ -1021,7 +1021,7 @@ case "${target}" in
mips*-*-*)
noconfigdirs="$noconfigdirs gprof"
;;

2
toolchain/binutils/patches/2.23.1/300-001_ld_makefile_patch.patch
View File

@ -11,7 +11,7 @@
EMULATION_OFILES = @EMULATION_OFILES@
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -366,7 +366,7 @@ AM_CFLAGS = $(WARN_CFLAGS)
@@ -367,7 +367,7 @@ AM_CFLAGS = $(WARN_CFLAGS)
# We put the scripts in the directory $(scriptdir)/ldscripts.
# We can't put the scripts in $(datadir) because the SEARCH_DIR
# directives need to be different for native and cross linkers.

4
toolchain/binutils/patches/2.23.1/300-012_check_ldrunpath_length.patch
View File

@ -1,6 +1,6 @@
--- a/ld/emultempl/elf32.em
+++ b/ld/emultempl/elf32.em
@@ -1273,6 +1273,8 @@ fragment <<EOF
@@ -1274,6 +1274,8 @@ fragment <<EOF
&& command_line.rpath == NULL)
{
lib_path = (const char *) getenv ("LD_RUN_PATH");
@ -9,7 +9,7 @@
if (gld${EMULATION_NAME}_search_needed (lib_path, &n,
force))
break;
@@ -1500,6 +1502,8 @@ gld${EMULATION_NAME}_before_allocation (
@@ -1501,6 +1503,8 @@ gld${EMULATION_NAME}_before_allocation (
rpath = command_line.rpath;
if (rpath == NULL)
rpath = (const char *) getenv ("LD_RUN_PATH");