Changelog since 5.4.24 mentions CVE-2019-19769, CVE-2020-8648, CVE-2020-8649 and CVE-2020-8647. Removed upstreamed: generic: 507-v5.6-iio-chemical-sps30-fix-missing-triggered-buffer-depe.patch generic: 600-ipv6-addrconf-call-ipv6_mc_up-for-non-Ethernet-inter.patch bcm27xx: 950-0435-ASoC-pcm512x-Fix-unbalanced-regulator-enable-call-in.patch ipq806x: 701-stmmac-fix-notifier-registration.patch lantiq: 002-pinctrl-falcon-fix-syntax-error.patch octeontx: 0002-net-thunderx-workaround-BGX-TX-Underflow-issue.patch Run tested: apu2, qemu-x86-64, apalis, a64-olinuxino, nbg6617 Build tested: sunxi/a53, imx6, x86/64, ipq40xx Tested-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk> [apu2] Signed-off-by: Petr Štetiar <ynezz@true.cz>
		
			
				
	
	
		
			436 lines
		
	
	
		
			9.5 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			436 lines
		
	
	
		
			9.5 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From 169e12f99cf9d5fce752564f32fd8df96461de43 Mon Sep 17 00:00:00 2001
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						|
From: Robert Jones <rjones@gateworks.com>
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						|
Date: Wed, 8 Jan 2020 07:44:23 -0800
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Subject: [PATCH 3/4] ARM: dts: imx: Add GW5913 board support
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						|
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						|
The Gateworks GW5913 is an IMX6 SoC based single board computer with:
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						|
 - IMX6Q or IMX6DL
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 - 32bit DDR3 DRAM
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 - FEC GbE RJ45 front-panel
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 - 1x miniPCIe socket with PCI Gen2, USB2
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 - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM
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 - 6V to 60V DC input connector
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 - GPS (ublox ZOE-M8Q)
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 - bi-color front-panel LED
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 - 256MB NAND boot device
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 - nanoSIM socket
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 - user pushbutton
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 - Gateworks System Controller (hwmon, pushbutton controller, EEPROM)
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						|
 | 
						|
Signed-off-by: Robert Jones <rjones@gateworks.com>
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Reviewed-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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---
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 arch/arm/boot/dts/Makefile            |   2 +
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 arch/arm/boot/dts/imx6dl-gw5913.dts   |  14 ++
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 arch/arm/boot/dts/imx6q-gw5913.dts    |  14 ++
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 arch/arm/boot/dts/imx6qdl-gw5913.dtsi | 348 ++++++++++++++++++++++++++++++++++
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 4 files changed, 378 insertions(+)
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 create mode 100644 arch/arm/boot/dts/imx6dl-gw5913.dts
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 create mode 100644 arch/arm/boot/dts/imx6q-gw5913.dts
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 create mode 100644 arch/arm/boot/dts/imx6qdl-gw5913.dtsi
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						|
 | 
						|
--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
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 	imx6dl-gw5904.dtb \
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 	imx6dl-gw5907.dtb \
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 	imx6dl-gw5910.dtb \
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+	imx6dl-gw5913.dtb \
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 	imx6dl-hummingboard.dtb \
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 	imx6dl-hummingboard-emmc-som-v15.dtb \
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 	imx6dl-hummingboard-som-v15.dtb \
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@@ -493,6 +494,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
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 	imx6q-gw5904.dtb \
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 	imx6q-gw5907.dtb \
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						|
 	imx6q-gw5910.dtb \
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						|
+	imx6q-gw5913.dtb \
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						|
 	imx6q-h100.dtb \
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						|
 	imx6q-hummingboard.dtb \
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 	imx6q-hummingboard-emmc-som-v15.dtb \
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						|
--- /dev/null
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+++ b/arch/arm/boot/dts/imx6dl-gw5913.dts
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@@ -0,0 +1,14 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Copyright 2019 Gateworks Corporation
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+ */
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+
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+/dts-v1/;
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+
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+#include "imx6dl.dtsi"
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+#include "imx6qdl-gw5913.dtsi"
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+
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+/ {
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						|
+	model = "Gateworks Ventana i.MX6 DualLite/Solo GW5913";
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						|
+	compatible = "gw,imx6dl-gw5913", "gw,ventana", "fsl,imx6dl";
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						|
+};
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						|
--- /dev/null
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						|
+++ b/arch/arm/boot/dts/imx6q-gw5913.dts
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						|
@@ -0,0 +1,14 @@
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						|
+// SPDX-License-Identifier: GPL-2.0
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						|
+/*
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						|
+ * Copyright 2019 Gateworks Corporation
 | 
						|
+ */
 | 
						|
+
 | 
						|
+/dts-v1/;
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						|
+
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						|
+#include "imx6q.dtsi"
 | 
						|
+#include "imx6qdl-gw5913.dtsi"
 | 
						|
+
 | 
						|
+/ {
 | 
						|
+	model = "Gateworks Ventana i.MX6 Dual/Quad GW5913";
 | 
						|
+	compatible = "gw,imx6q-gw5913", "gw,ventana", "fsl,imx6q";
 | 
						|
+};
 | 
						|
--- /dev/null
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						|
+++ b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi
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@@ -0,0 +1,348 @@
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						|
+// SPDX-License-Identifier: GPL-2.0
 | 
						|
+/*
 | 
						|
+ * Copyright 2019 Gateworks Corporation
 | 
						|
+ */
 | 
						|
+
 | 
						|
+#include <dt-bindings/gpio/gpio.h>
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						|
+
 | 
						|
+/ {
 | 
						|
+	/* these are used by bootloader for disabling nodes */
 | 
						|
+	aliases {
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						|
+		led0 = &led0;
 | 
						|
+		led1 = &led1;
 | 
						|
+		nand = &gpmi;
 | 
						|
+		usb0 = &usbh1;
 | 
						|
+		usb1 = &usbotg;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	chosen {
 | 
						|
+		stdout-path = &uart2;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	leds {
 | 
						|
+		compatible = "gpio-leds";
 | 
						|
+		pinctrl-names = "default";
 | 
						|
+		pinctrl-0 = <&pinctrl_gpio_leds>;
 | 
						|
+
 | 
						|
+		led0: user1 {
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						|
+			label = "user1";
 | 
						|
+			gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
 | 
						|
+			default-state = "on";
 | 
						|
+			linux,default-trigger = "heartbeat";
 | 
						|
+		};
 | 
						|
+
 | 
						|
+		led1: user2 {
 | 
						|
+			label = "user2";
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						|
+			gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
 | 
						|
+			default-state = "off";
 | 
						|
+		};
 | 
						|
+	};
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						|
+
 | 
						|
+	memory@10000000 {
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						|
+		device_type = "memory";
 | 
						|
+		reg = <0x10000000 0x20000000>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pps {
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+		compatible = "pps-gpio";
 | 
						|
+		pinctrl-names = "default";
 | 
						|
+		pinctrl-0 = <&pinctrl_pps>;
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						|
+		gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
 | 
						|
+		status = "okay";
 | 
						|
+	};
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+
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						|
+	reg_3p3v: regulator-3p3v {
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						|
+		compatible = "regulator-fixed";
 | 
						|
+		regulator-name = "3P3V";
 | 
						|
+		regulator-min-microvolt = <3300000>;
 | 
						|
+		regulator-max-microvolt = <3300000>;
 | 
						|
+		regulator-always-on;
 | 
						|
+	};
 | 
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+
 | 
						|
+	reg_5p0v: regulator-5p0v {
 | 
						|
+		compatible = "regulator-fixed";
 | 
						|
+		regulator-name = "5P0V";
 | 
						|
+		regulator-min-microvolt = <5000000>;
 | 
						|
+		regulator-max-microvolt = <5000000>;
 | 
						|
+		regulator-always-on;
 | 
						|
+	};
 | 
						|
+};
 | 
						|
+
 | 
						|
+&fec {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_enet>;
 | 
						|
+	phy-mode = "rgmii-id";
 | 
						|
+	status = "okay";
 | 
						|
+};
 | 
						|
+
 | 
						|
+&gpmi {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_gpmi_nand>;
 | 
						|
+	status = "okay";
 | 
						|
+};
 | 
						|
+
 | 
						|
+&i2c1 {
 | 
						|
+	clock-frequency = <100000>;
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_i2c1>;
 | 
						|
+	status = "okay";
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						|
+
 | 
						|
+	gpio@23 {
 | 
						|
+		compatible = "nxp,pca9555";
 | 
						|
+		reg = <0x23>;
 | 
						|
+		gpio-controller;
 | 
						|
+		#gpio-cells = <2>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	eeprom@50 {
 | 
						|
+		compatible = "atmel,24c02";
 | 
						|
+		reg = <0x50>;
 | 
						|
+		pagesize = <16>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	eeprom@51 {
 | 
						|
+		compatible = "atmel,24c02";
 | 
						|
+		reg = <0x51>;
 | 
						|
+		pagesize = <16>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	eeprom@52 {
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						|
+		compatible = "atmel,24c02";
 | 
						|
+		reg = <0x52>;
 | 
						|
+		pagesize = <16>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	eeprom@53 {
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						|
+		compatible = "atmel,24c02";
 | 
						|
+		reg = <0x53>;
 | 
						|
+		pagesize = <16>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	rtc@68 {
 | 
						|
+		compatible = "dallas,ds1672";
 | 
						|
+		reg = <0x68>;
 | 
						|
+	};
 | 
						|
+};
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						|
+
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						|
+&i2c2 {
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						|
+	clock-frequency = <100000>;
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_i2c2>;
 | 
						|
+	status = "okay";
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						|
+};
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						|
+
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						|
+&i2c3 {
 | 
						|
+	clock-frequency = <100000>;
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						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_i2c3>;
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+	status = "okay";
 | 
						|
+};
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+
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						|
+&pcie {
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+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_pcie>;
 | 
						|
+	reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
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						|
+	status = "okay";
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						|
+};
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						|
+
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						|
+&pwm2 {
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						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
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+	status = "disabled";
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						|
+};
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+
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+&pwm3 {
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						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
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						|
+	status = "disabled";
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						|
+};
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						|
+
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						|
+&pwm4 {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
 | 
						|
+	status = "disabled";
 | 
						|
+};
 | 
						|
+
 | 
						|
+&uart1 {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_uart1>;
 | 
						|
+	status = "okay";
 | 
						|
+};
 | 
						|
+
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						|
+&uart2 {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_uart2>;
 | 
						|
+	status = "okay";
 | 
						|
+};
 | 
						|
+
 | 
						|
+&uart3 {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_uart3>;
 | 
						|
+	status = "okay";
 | 
						|
+};
 | 
						|
+
 | 
						|
+&uart5 {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_uart5>;
 | 
						|
+	status = "okay";
 | 
						|
+};
 | 
						|
+
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						|
+&usbotg {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_usbotg>;
 | 
						|
+	disable-over-current;
 | 
						|
+	status = "okay";
 | 
						|
+};
 | 
						|
+
 | 
						|
+&usbh1 {
 | 
						|
+	status = "okay";
 | 
						|
+};
 | 
						|
+
 | 
						|
+&wdog1 {
 | 
						|
+	pinctrl-names = "default";
 | 
						|
+	pinctrl-0 = <&pinctrl_wdog>;
 | 
						|
+	fsl,ext-reset-output;
 | 
						|
+};
 | 
						|
+
 | 
						|
+&iomuxc {
 | 
						|
+	pinctrl_enet: enetgrp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
 | 
						|
+			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
 | 
						|
+			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
 | 
						|
+			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
 | 
						|
+			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
 | 
						|
+			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8
 | 
						|
+			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_gpio_leds: gpioledsgrp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
 | 
						|
+			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07		0x1b0b0
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_gpmi_nand: gpminandgrp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
 | 
						|
+			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
 | 
						|
+			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
 | 
						|
+			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
 | 
						|
+			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_i2c1: i2c1grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
 | 
						|
+			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
 | 
						|
+			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0x0001b0b0
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_i2c2: i2c2grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
 | 
						|
+			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_i2c3: i2c3grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
 | 
						|
+			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_pcie: pciegrp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_pps: ppsgrp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_pwm2: pwm2grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_pwm3: pwm3grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_pwm4: pwm4grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_SD1_CMD__PWM4_OUT		0x1b0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_uart1: uart1grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
 | 
						|
+			MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_uart2: uart2grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
 | 
						|
+			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_uart3: uart3grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
 | 
						|
+			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_uart5: uart5grp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
 | 
						|
+			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_usbotg: usbotggrp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+
 | 
						|
+	pinctrl_wdog: wdoggrp {
 | 
						|
+		fsl,pins = <
 | 
						|
+			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
 | 
						|
+		>;
 | 
						|
+	};
 | 
						|
+};
 |