e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
160 lines
2.1 KiB
Plaintext
160 lines
2.1 KiB
Plaintext
/dts-v1/;
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "glinet,gl-mt750", "ralink,mt7620a-soc";
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model = "GL-MT750";
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aliases {
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label-mac-device = &wmac;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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leds {
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compatible = "gpio-leds";
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wan {
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label = "gl-mt750:wan";
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gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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};
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lan {
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label = "gl-mt750:lan";
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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wlan {
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label = "gl-mt750:wlan";
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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BTN_0 {
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label = "BTN_0";
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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BTN_1 {
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label = "BTN_1";
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gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_1>;
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};
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xf80000>;
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};
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partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x10000>;
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};
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};
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};
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};
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&sdhci {
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status = "okay";
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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ðernet {
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mtd-mac-address = <&factory 0x4000>;
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mediatek,portmap = "llllw";
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};
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&wmac {
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ralink,mtd-eeprom = <&factory 0>;
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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};
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};
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&state_default {
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gpio {
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ralink,group = "wled","ephy","uartf";
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ralink,function = "gpio";
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};
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};
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