Reworked: - 0034 patchset update Added: - 080 Add support for pinctrl-msm framework Removed: - 0074-ipq806x-usb-Control-USB-master-reset.patch (we now have a dedicated driver for qcom usb) - 0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke (merged upstream) - 310-msm-adhoc-bus-support (it looks like it was never actually used in any dts) Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> [commit subject and description facelift, SoB fix] Signed-off-by: Petr Štetiar <ynezz@true.cz>
		
			
				
	
	
		
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			92 lines
		
	
	
		
			3.2 KiB
		
	
	
	
		
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| From b74bab6186131eea09459eedf5d737645a3559c9 Mon Sep 17 00:00:00 2001
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| From: Abhishek Sahu <absahu@codeaurora.org>
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| Date: Thu, 22 Dec 2016 11:18:45 +0530
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| Subject: pcie: qcom: Fixed pcie_phy_clk branch issue
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| 
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| Following backtraces are observed in PCIe deinit operation.
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| 
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|  Hardware name: Qualcomm (Flattened Device Tree)
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|  (unwind_backtrace) from [] (show_stack+0x10/0x14)
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|  (show_stack) from [] (dump_stack+0x84/0x98)
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|  (dump_stack) from [] (warn_slowpath_common+0x9c/0xb8)
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|  (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40)
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|  (warn_slowpath_fmt) from [] (clk_branch_wait+0x114/0x120)
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|  (clk_branch_wait) from [] (clk_core_disable+0xd0/0x1f4)
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|  (clk_core_disable) from [] (clk_disable+0x24/0x30)
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|  (clk_disable) from [] (qcom_pcie_deinit_v0+0x6c/0xb8)
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|  (qcom_pcie_deinit_v0) from [] (qcom_pcie_host_init+0xe0/0xe8)
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|  (qcom_pcie_host_init) from [] (dw_pcie_host_init+0x3b0/0x538)
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|  (dw_pcie_host_init) from [] (qcom_pcie_probe+0x20c/0x2e4)
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| 
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| pcie_phy_clk is generated for PCIe controller itself and the
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| GCC controls its branch operation. This error is coming since
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| the assert operations turn off the parent clock before branch
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| clock. Now this patch moves clk_disable_unprepare before assert
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| operations.
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| 
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| Similarly, during probe function, the clock branch operation
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| should be done after dessert operation. Currently, it does not
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| generate any error since bootloader enables the pcie_phy_clk
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| but the same error is coming during probe, if bootloader
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| disables pcie_phy_clk.
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| 
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| Change-Id: Ib29c154d10eb64363d9cc982ce5fd8107af5627d
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| Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
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| ---
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|  drivers/pci/host/pcie-qcom.c | 16 +++++++---------
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|  1 file changed, 7 insertions(+), 9 deletions(-)
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| 
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| --- a/drivers/pci/controller/dwc/pcie-qcom.c
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| +++ b/drivers/pci/controller/dwc/pcie-qcom.c
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| @@ -393,6 +393,7 @@ static void qcom_pcie_deinit_2_1_0(struc
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|  {
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|  	struct qcom_pcie_resources_2_1_0 *res = &pcie->res.v2_1_0;
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|  
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| +	clk_disable_unprepare(res->phy_clk);
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|  	reset_control_assert(res->pci_reset);
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|  	reset_control_assert(res->axi_reset);
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|  	reset_control_assert(res->ahb_reset);
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| @@ -401,7 +402,6 @@ static void qcom_pcie_deinit_2_1_0(struc
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|  	reset_control_assert(res->ext_reset);
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|  	clk_disable_unprepare(res->iface_clk);
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|  	clk_disable_unprepare(res->core_clk);
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| -	clk_disable_unprepare(res->phy_clk);
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|  	clk_disable_unprepare(res->aux_clk);
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|  	clk_disable_unprepare(res->ref_clk);
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|  	regulator_bulk_disable(ARRAY_SIZE(res->supplies), res->supplies);
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| @@ -444,12 +444,6 @@ static int qcom_pcie_init_2_1_0(struct q
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|  		goto err_clk_core;
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|  	}
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|  
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| -	ret = clk_prepare_enable(res->phy_clk);
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| -	if (ret) {
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| -		dev_err(dev, "cannot prepare/enable phy clock\n");
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| -		goto err_clk_phy;
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| -	}
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| -
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|  	ret = clk_prepare_enable(res->aux_clk);
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|  	if (ret) {
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|  		dev_err(dev, "cannot prepare/enable aux clock\n");
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| @@ -513,6 +507,12 @@ static int qcom_pcie_init_2_1_0(struct q
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|  		return ret;
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|  	}
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|  
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| +	ret = clk_prepare_enable(res->phy_clk);
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| +	if (ret) {
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| +		dev_err(dev, "cannot prepare/enable phy clock\n");
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| +		goto err_deassert_ahb;
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| +	}
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| +
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|  	/* wait for clock acquisition */
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|  	usleep_range(1000, 1500);
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|  	if (pcie->force_gen1) {
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| @@ -538,8 +538,6 @@ err_deassert_ahb:
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|  err_clk_ref:
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|  	clk_disable_unprepare(res->aux_clk);
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|  err_clk_aux:
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| -	clk_disable_unprepare(res->phy_clk);
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| -err_clk_phy:
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|  	clk_disable_unprepare(res->core_clk);
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|  err_clk_core:
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|  	clk_disable_unprepare(res->iface_clk);
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