63066d3006
Reworked: - 0034 patchset update Added: - 080 Add support for pinctrl-msm framework Removed: - 0074-ipq806x-usb-Control-USB-master-reset.patch (we now have a dedicated driver for qcom usb) - 0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke (merged upstream) - 310-msm-adhoc-bus-support (it looks like it was never actually used in any dts) Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> [commit subject and description facelift, SoB fix] Signed-off-by: Petr Štetiar <ynezz@true.cz>
63 lines
1.9 KiB
Diff
63 lines
1.9 KiB
Diff
From 490d103232287eb51c92c49a4ef8865fd0a9d59e Mon Sep 17 00:00:00 2001
|
|
From: Sham Muthayyan <smuthayy@codeaurora.org>
|
|
Date: Tue, 19 Jul 2016 18:58:18 +0530
|
|
Subject: PCI: qcom: Fixed IPQ806x PCIE reset changes
|
|
|
|
Change-Id: Ia6590e960b9754b1e8b7a51f318788cd63e9e321
|
|
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
|
|
---
|
|
|
|
--- a/drivers/pci/controller/dwc/pcie-qcom.c
|
|
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
|
|
@@ -92,6 +92,7 @@ struct qcom_pcie_resources_2_1_0 {
|
|
struct reset_control *ahb_reset;
|
|
struct reset_control *por_reset;
|
|
struct reset_control *phy_reset;
|
|
+ struct reset_control *ext_reset;
|
|
struct regulator_bulk_data supplies[QCOM_PCIE_2_1_0_MAX_SUPPLY];
|
|
};
|
|
|
|
@@ -261,6 +262,10 @@ static int qcom_pcie_get_resources_2_1_0
|
|
if (IS_ERR(res->por_reset))
|
|
return PTR_ERR(res->por_reset);
|
|
|
|
+ res->ext_reset = devm_reset_control_get(dev, "ext");
|
|
+ if (IS_ERR(res->ext_reset))
|
|
+ return PTR_ERR(res->ext_reset);
|
|
+
|
|
res->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
|
|
return PTR_ERR_OR_ZERO(res->phy_reset);
|
|
}
|
|
@@ -274,6 +279,7 @@ static void qcom_pcie_deinit_2_1_0(struc
|
|
reset_control_assert(res->ahb_reset);
|
|
reset_control_assert(res->por_reset);
|
|
reset_control_assert(res->pci_reset);
|
|
+ reset_control_assert(res->ext_reset);
|
|
clk_disable_unprepare(res->iface_clk);
|
|
clk_disable_unprepare(res->core_clk);
|
|
clk_disable_unprepare(res->phy_clk);
|
|
@@ -290,15 +296,21 @@ static int qcom_pcie_init_2_1_0(struct q
|
|
u32 val;
|
|
int ret;
|
|
|
|
+ ret = reset_control_assert(res->ahb_reset);
|
|
+ if (ret) {
|
|
+ dev_err(dev, "cannot assert ahb reset\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(res->supplies), res->supplies);
|
|
if (ret < 0) {
|
|
dev_err(dev, "cannot enable regulators\n");
|
|
return ret;
|
|
}
|
|
|
|
- ret = reset_control_assert(res->ahb_reset);
|
|
+ ret = reset_control_deassert(res->ext_reset);
|
|
if (ret) {
|
|
- dev_err(dev, "cannot assert ahb reset\n");
|
|
+ dev_err(dev, "cannot assert ext reset\n");
|
|
goto err_assert_ahb;
|
|
}
|
|
|