e115fa478f
Refreshed all patches. Remove upstreamed: - 010-dmaengine-dw-dmac-implement-dma-prot.patch - 950-0148-Increase-firmware-call-buffer-size-to-48-bytes.patch - 950-0206-Mailbox-firmware-calls-now-use-kmalloc-2749.patch - 402-leds-trigger-netdev-fix-handling-on-interface-rename.patch Fixes: - CVE-2019-19332 Compile-tested on: cns3xxx Runtime-tested on: cns3xxx Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com> [Add 010-dt-bindings-dmaengine-dw-dmac-add-protection-control.patch] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
200 lines
5.5 KiB
Diff
200 lines
5.5 KiB
Diff
From d072bfa4885354fff86aa1fb1dbc4f1533c9e0bf Mon Sep 17 00:00:00 2001
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From: Christian Lamparter <chunkeey@gmail.com>
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Date: Sun, 23 Dec 2018 02:16:13 +0100
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Subject: [PATCH 06/15] crypto: crypto4xx - add prng crypto support
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This patch adds support for crypto4xx's ANSI X9.17 Annex C compliant
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pseudo random number generator which provides a pseudo random source
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for the purpose of generating Initialization Vectors (IV's) for AES
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algorithms to the Packet Engine and other pseudo random number
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requirements.
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Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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---
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drivers/crypto/amcc/crypto4xx_core.c | 87 +++++++++++++++++++++++++
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drivers/crypto/amcc/crypto4xx_core.h | 4 ++
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drivers/crypto/amcc/crypto4xx_reg_def.h | 1 +
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3 files changed, 92 insertions(+)
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--- a/drivers/crypto/amcc/crypto4xx_core.c
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+++ b/drivers/crypto/amcc/crypto4xx_core.c
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@@ -40,9 +40,11 @@
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#include <crypto/ctr.h>
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#include <crypto/gcm.h>
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#include <crypto/sha.h>
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+#include <crypto/rng.h>
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#include <crypto/scatterwalk.h>
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#include <crypto/skcipher.h>
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#include <crypto/internal/aead.h>
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+#include <crypto/internal/rng.h>
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#include <crypto/internal/skcipher.h>
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#include "crypto4xx_reg_def.h"
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#include "crypto4xx_core.h"
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@@ -1042,6 +1044,10 @@ static int crypto4xx_register_alg(struct
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rc = crypto_register_ahash(&alg->alg.u.hash);
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break;
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+ case CRYPTO_ALG_TYPE_RNG:
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+ rc = crypto_register_rng(&alg->alg.u.rng);
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+ break;
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+
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default:
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rc = crypto_register_skcipher(&alg->alg.u.cipher);
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break;
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@@ -1071,6 +1077,10 @@ static void crypto4xx_unregister_alg(str
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crypto_unregister_aead(&alg->alg.u.aead);
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break;
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+ case CRYPTO_ALG_TYPE_RNG:
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+ crypto_unregister_rng(&alg->alg.u.rng);
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+ break;
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+
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default:
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crypto_unregister_skcipher(&alg->alg.u.cipher);
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}
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@@ -1129,6 +1139,69 @@ static irqreturn_t crypto4xx_ce_interrup
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PPC4XX_TMO_ERR_INT);
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}
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+static int ppc4xx_prng_data_read(struct crypto4xx_device *dev,
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+ u8 *data, unsigned int max)
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+{
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+ unsigned int i, curr = 0;
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+ u32 val[2];
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+
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+ do {
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+ /* trigger PRN generation */
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+ writel(PPC4XX_PRNG_CTRL_AUTO_EN,
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+ dev->ce_base + CRYPTO4XX_PRNG_CTRL);
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+
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+ for (i = 0; i < 1024; i++) {
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+ /* usually 19 iterations are enough */
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+ if ((readl(dev->ce_base + CRYPTO4XX_PRNG_STAT) &
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+ CRYPTO4XX_PRNG_STAT_BUSY))
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+ continue;
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+
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+ val[0] = readl_be(dev->ce_base + CRYPTO4XX_PRNG_RES_0);
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+ val[1] = readl_be(dev->ce_base + CRYPTO4XX_PRNG_RES_1);
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+ break;
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+ }
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+ if (i == 1024)
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+ return -ETIMEDOUT;
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+
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+ if ((max - curr) >= 8) {
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+ memcpy(data, &val, 8);
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+ data += 8;
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+ curr += 8;
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+ } else {
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+ /* copy only remaining bytes */
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+ memcpy(data, &val, max - curr);
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+ break;
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+ }
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+ } while (curr < max);
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+
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+ return curr;
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+}
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+
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+static int crypto4xx_prng_generate(struct crypto_rng *tfm,
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+ const u8 *src, unsigned int slen,
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+ u8 *dstn, unsigned int dlen)
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+{
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+ struct rng_alg *alg = crypto_rng_alg(tfm);
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+ struct crypto4xx_alg *amcc_alg;
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+ struct crypto4xx_device *dev;
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+ int ret;
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+
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+ amcc_alg = container_of(alg, struct crypto4xx_alg, alg.u.rng);
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+ dev = amcc_alg->dev;
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+
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+ mutex_lock(&dev->core_dev->rng_lock);
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+ ret = ppc4xx_prng_data_read(dev, dstn, dlen);
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+ mutex_unlock(&dev->core_dev->rng_lock);
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+ return ret;
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+}
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+
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+
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+static int crypto4xx_prng_seed(struct crypto_rng *tfm, const u8 *seed,
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+ unsigned int slen)
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+{
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+ return 0;
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+}
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+
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/**
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* Supported Crypto Algorithms
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*/
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@@ -1298,6 +1371,18 @@ static struct crypto4xx_alg_common crypt
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.cra_module = THIS_MODULE,
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},
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} },
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+ { .type = CRYPTO_ALG_TYPE_RNG, .u.rng = {
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+ .base = {
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+ .cra_name = "stdrng",
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+ .cra_driver_name = "crypto4xx_rng",
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+ .cra_priority = 300,
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+ .cra_ctxsize = 0,
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+ .cra_module = THIS_MODULE,
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+ },
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+ .generate = crypto4xx_prng_generate,
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+ .seed = crypto4xx_prng_seed,
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+ .seedsize = 0,
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+ } },
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};
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/**
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@@ -1367,6 +1452,7 @@ static int crypto4xx_probe(struct platfo
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core_dev->dev->core_dev = core_dev;
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core_dev->dev->is_revb = is_revb;
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core_dev->device = dev;
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+ mutex_init(&core_dev->rng_lock);
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spin_lock_init(&core_dev->lock);
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INIT_LIST_HEAD(&core_dev->dev->alg_list);
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ratelimit_default_init(&core_dev->dev->aead_ratelimit);
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@@ -1446,6 +1532,7 @@ static int crypto4xx_remove(struct platf
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tasklet_kill(&core_dev->tasklet);
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/* Un-register with Linux CryptoAPI */
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crypto4xx_unregister_alg(core_dev->dev);
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+ mutex_destroy(&core_dev->rng_lock);
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/* Free all allocated memory */
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crypto4xx_stop_all(core_dev);
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--- a/drivers/crypto/amcc/crypto4xx_core.h
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+++ b/drivers/crypto/amcc/crypto4xx_core.h
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@@ -23,8 +23,10 @@
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#define __CRYPTO4XX_CORE_H__
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#include <linux/ratelimit.h>
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+#include <linux/mutex.h>
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#include <crypto/internal/hash.h>
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#include <crypto/internal/aead.h>
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+#include <crypto/internal/rng.h>
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#include <crypto/internal/skcipher.h>
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#include "crypto4xx_reg_def.h"
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#include "crypto4xx_sa.h"
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@@ -119,6 +121,7 @@ struct crypto4xx_core_device {
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u32 irq;
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struct tasklet_struct tasklet;
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spinlock_t lock;
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+ struct mutex rng_lock;
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};
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struct crypto4xx_ctx {
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@@ -143,6 +146,7 @@ struct crypto4xx_alg_common {
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struct skcipher_alg cipher;
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struct ahash_alg hash;
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struct aead_alg aead;
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+ struct rng_alg rng;
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} u;
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};
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--- a/drivers/crypto/amcc/crypto4xx_reg_def.h
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+++ b/drivers/crypto/amcc/crypto4xx_reg_def.h
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@@ -100,6 +100,7 @@
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#define CRYPTO4XX_ENDIAN_CFG 0x000600d8
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#define CRYPTO4XX_PRNG_STAT 0x00070000
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+#define CRYPTO4XX_PRNG_STAT_BUSY 0x1
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#define CRYPTO4XX_PRNG_CTRL 0x00070004
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#define CRYPTO4XX_PRNG_SEED_L 0x00070008
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#define CRYPTO4XX_PRNG_SEED_H 0x0007000c
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