The whole logic in fe_phy_connect() is based on the asumption that mdio
address and switch port id are equal. Albeit it is true for most
boards, it doesn't is for all.
It isn't yet clear which subtargets/boards require the devicetree less
ethernet phy handling. Hence change the code in a way that it doesn't
touch ethernet phys which were early attached and are already handled.
Signed-off-by: Mathias Kresin <dev@kresin.me>
When PHY's are defined on the MDIO bus in the DTS, gigabit support was
being masked out for no apparent reason, pegging all such ports to 10/100.
If gigabit support must be disabled for some reason, there should be a
"max-speed" property in the DTS.
Reported-by: James McKenzie <openwrt@madingley.org>
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
