ipq806x: fix pcie tx termination offset
According to GPL tarballs and QSDK related branch tx termination
offset for ipq8064 SoC version >= 2.0 should be equal to 0 and
not 7.
https://github.com/paul-chambers/netgear-r7800/blob/master/git_home/linux.git/sourcecode/arch/arm/mach-msm/board-ipq806x.c#L1682-L1685
Fix this.
Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
[slh: rebase for kernel v4.14 as well]
Signed-off-by: Stefan Lippers-Hollmann <s.l-h@gmx.de>
(cherry picked from commit fbedc2213c
)
This commit is contained in:
parent
a64a36308c
commit
8458febc01
@ -14,5 +14,17 @@
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tx_deamp_3_5db = <32>;
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mpll = <0xa0>;
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};
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pcie0: pci@1b500000 {
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phy-tx0-term-offset = <0>;
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};
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pcie1: pci@1b700000 {
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phy-tx0-term-offset = <0>;
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};
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pcie2: pci@1b900000 {
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phy-tx0-term-offset = <0>;
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};
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};
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};
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@ -14,5 +14,17 @@
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tx_deamp_3_5db = <32>;
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mpll = <0xa0>;
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};
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pcie0: pci@1b500000 {
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phy-tx0-term-offset = <0>;
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};
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pcie1: pci@1b700000 {
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phy-tx0-term-offset = <0>;
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};
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pcie2: pci@1b900000 {
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phy-tx0-term-offset = <0>;
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};
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};
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};
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