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03a777c293
Refresh uboot-lantiq patches. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> SVN-Revision: 40546
166 lines
4.3 KiB
Diff
166 lines
4.3 KiB
Diff
From e17398316e82d8b28217232b4fd6030c65138e74 Mon Sep 17 00:00:00 2001
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From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Date: Mon, 12 Aug 2013 01:18:00 +0200
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Subject: MIPS: lantiq: add NAND SPL support
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Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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--- a/arch/mips/cpu/mips32/lantiq-common/spl.c
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+++ b/arch/mips/cpu/mips32/lantiq-common/spl.c
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@@ -8,6 +8,7 @@
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#include <image.h>
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#include <version.h>
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#include <spi_flash.h>
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+#include <nand.h>
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#include <linux/compiler.h>
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#include <lzma/LzmaDec.h>
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#include <linux/lzo.h>
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@@ -63,6 +64,18 @@
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#define spl_boot_nor_flash 0
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#endif
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+#if defined(CONFIG_LTQ_SUPPORT_SPL_NAND_FLASH) && defined(CONFIG_SYS_BOOT_NANDSPL)
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+#define spl_boot_nand_flash 1
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+#else
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+#define spl_boot_nand_flash 0
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+#ifndef CONFIG_SYS_NAND_U_BOOT_OFFS
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+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0
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+#endif
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+#ifndef CONFIG_SYS_NAND_PAGE_SIZE
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+#define CONFIG_SYS_NAND_PAGE_SIZE 0
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+#endif
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+#endif
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+
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#define spl_sync() __asm__ __volatile__("sync");
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struct spl_image {
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@@ -337,6 +350,58 @@ static int spl_load_nor_flash(struct spl
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return ret;
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}
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+static int spl_load_nand_flash(struct spl_image *spl)
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+{
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+ image_header_t *hdr;
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+ int ret;
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+ unsigned long loadaddr;
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+
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+ /*
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+ * Image format:
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+ *
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+ * - 12 byte non-volatile bootstrap header
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+ * - SPL binary
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+ * - 12 byte non-volatile bootstrap header
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+ * - padding bytes up to CONFIG_SYS_NAND_U_BOOT_OFFS
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+ * - 64 byte U-Boot mkimage header
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+ * - U-Boot binary
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+ */
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+ spl->data_addr = CONFIG_SYS_NAND_U_BOOT_OFFS;
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+
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+ spl_puts("SPL: initializing NAND flash\n");
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+ nand_init();
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+
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+ spl_debug("SPL: reading image header at page offset %lx\n",
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+ spl->data_addr);
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+
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+ hdr = (image_header_t *) CONFIG_LOADADDR;
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+ ret = nand_spl_load_image(spl->data_addr,
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+ CONFIG_SYS_NAND_PAGE_SIZE, hdr);
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+ if (ret)
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+ return ret;
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+
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+ spl_debug("SPL: checking image header at address %p\n", hdr);
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+
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+ ret = spl_parse_image(hdr, spl);
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+ if (ret)
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+ return ret;
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+
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+ if (spl_is_compressed(spl))
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+ loadaddr = CONFIG_LOADADDR;
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+ else
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+ loadaddr = spl->entry_addr;
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+
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+ spl_puts("SPL: loading U-Boot to RAM\n");
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+
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+ ret = nand_spl_load_image(spl->data_addr, spl->data_size,
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+ (void *) loadaddr);
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+
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+ if (spl_is_compressed(spl))
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+ ret = spl_uncompress(spl, loadaddr);
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+
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+ return ret;
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+}
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+
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static int spl_load(struct spl_image *spl)
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{
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int ret;
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@@ -345,6 +410,8 @@ static int spl_load(struct spl_image *sp
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ret = spl_load_spi_flash(spl);
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else if (spl_boot_nor_flash)
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ret = spl_load_nor_flash(spl);
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+ else if (spl_boot_nand_flash)
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+ ret = spl_load_nand_flash(spl);
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else
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ret = 1;
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--- a/arch/mips/include/asm/lantiq/config.h
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+++ b/arch/mips/include/asm/lantiq/config.h
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@@ -40,6 +40,26 @@
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#define CONFIG_SPI_SPL_SIMPLE
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#endif
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+/*
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+ * NAND flash SPL
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+ * BOOT CFG 06 only (address cycle based probing, 2KB or 512B page size)
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+ */
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+#if defined(CONFIG_LTQ_SUPPORT_SPL_NAND_FLASH) && defined(CONFIG_SYS_BOOT_NANDSPL)
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+#define CONFIG_SPL
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+#define CONFIG_SPL_NAND_SUPPORT
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+#define CONFIG_SPL_NAND_DRIVERS
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+#define CONFIG_SPL_NAND_SIMPLE
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+#define CONFIG_SPL_NAND_ECC
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+
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+/* use software ECC until driver supports HW ECC */
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+#define CONFIG_SPL_NAND_SOFTECC
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+#define CONFIG_SYS_NAND_ECCSIZE 256
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+#define CONFIG_SYS_NAND_ECCBYTES 3
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+#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47, \
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+ 48, 49, 50, 51, 52, 53, 54, 55, \
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+ 56, 57, 58, 59, 60, 61, 62, 63}
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+#endif
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+
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#if defined(CONFIG_LTQ_SUPPORT_SPL_NOR_FLASH) && defined(CONFIG_SYS_BOOT_NORSPL)
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#define CONFIG_SPL
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#endif
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@@ -148,6 +168,21 @@
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#define CONFIG_ENV_LOAD_UBOOT_SF
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#endif
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+#if defined(CONFIG_LTQ_SUPPORT_NAND_FLASH)
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+#define CONFIG_ENV_WRITE_UBOOT_NAND \
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+ "write-uboot-nand=" \
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+ "nand erase 0 $filesize && " \
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+ "nand write $fileaddr 0 $filesize\0"
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+
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+#define CONFIG_ENV_LOAD_UBOOT_NAND \
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+ "load-uboot-nandspl=tftpboot u-boot.ltq.nandspl\0" \
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+ "load-uboot-nandspl-lzo=tftpboot u-boot.ltq.lzo.nandspl\0" \
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+ "load-uboot-nandspl-lzma=tftpboot u-boot.ltq.lzma.nandspl\0"
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+#else
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+#define CONFIG_ENV_WRITE_UBOOT_NAND
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+#define CONFIG_ENV_LOAD_UBOOT_NAND
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+#endif
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+
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#define CONFIG_ENV_LANTIQ_DEFAULTS \
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CONFIG_ENV_CONSOLEDEV \
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CONFIG_ENV_ADDCONSOLE \
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@@ -159,6 +194,8 @@
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CONFIG_ENV_LOAD_UBOOT_NOR \
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CONFIG_ENV_SF_PROBE \
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CONFIG_ENV_WRITE_UBOOT_SF \
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- CONFIG_ENV_LOAD_UBOOT_SF
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+ CONFIG_ENV_LOAD_UBOOT_SF \
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+ CONFIG_ENV_WRITE_UBOOT_NAND \
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+ CONFIG_ENV_LOAD_UBOOT_NAND
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#endif /* __LANTIQ_CONFIG_H__ */
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