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13cdc8955c
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.80 Manually rebased: generic/hack-6.1/650-netfilter-add-xt_FLOWOFFLOAD-target.patch[1] All other patches automatically rebased. 1. Acknowledgement to @heheb and @DragonBluep. Upstream commit for ref: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.80&id=9c5662e95a8dcc232c3ef4deb21033badcd260f6 Build system: x86/64 Build-tested: x86/64/AMD Cezanne, ramips/tplink_archer-a6-v3 Run-tested: x86/64/AMD Cezanne, ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me>
85 lines
2.9 KiB
Diff
85 lines
2.9 KiB
Diff
From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Sat, 22 Apr 2023 03:26:01 +0100
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Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
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Setup Link Down Power Saving Mode according the DTS property
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just like for RTL821x 1GE PHYs.
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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drivers/net/phy/realtek.c | 11 +++++++++++
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1 file changed, 11 insertions(+)
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--- a/drivers/net/phy/realtek.c
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+++ b/drivers/net/phy/realtek.c
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@@ -62,6 +62,10 @@
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#define RTL8221B_SERDES_OPTION_MODE_2500BASEX 2
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#define RTL8221B_SERDES_OPTION_MODE_HISGMII 3
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+#define RTL8221B_PHYCR1 0xa430
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+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
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+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
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+
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#define RTL8366RB_POWER_SAVE 0x15
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#define RTL8366RB_POWER_SAVE_ON BIT(12)
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@@ -750,6 +754,25 @@ static int rtl8226_match_phy_device(stru
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rtlgen_supports_2_5gbps(phydev);
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}
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+static int rtl822x_probe(struct phy_device *phydev)
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+{
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+ struct device *dev = &phydev->mdio.dev;
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+ int val;
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+
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+ val = phy_read_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1);
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+ if (val < 0)
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+ return val;
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+
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+ if (of_property_read_bool(dev->of_node, "realtek,aldps-enable"))
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+ val |= RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN;
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+ else
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+ val &= ~(RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
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+
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+ phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, RTL8221B_PHYCR1, val);
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+
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+ return 0;
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+}
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+
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static int rtlgen_resume(struct phy_device *phydev)
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{
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int ret = genphy_resume(phydev);
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@@ -1061,6 +1084,7 @@ static struct phy_driver realtek_drvs[]
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.name = "RTL8226-CG 2.5Gbps PHY",
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.get_features = rtl822x_get_features,
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.config_aneg = rtl822x_config_aneg,
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+ .probe = rtl822x_probe,
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.read_status = rtl822x_read_status,
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.suspend = genphy_suspend,
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.resume = rtlgen_resume,
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@@ -1072,6 +1096,7 @@ static struct phy_driver realtek_drvs[]
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.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
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.get_features = rtl822x_get_features,
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.config_aneg = rtl822x_config_aneg,
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+ .probe = rtl822x_probe,
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.read_status = rtl822x_read_status,
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.suspend = genphy_suspend,
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.resume = rtlgen_resume,
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@@ -1084,6 +1109,7 @@ static struct phy_driver realtek_drvs[]
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.get_features = rtl822x_get_features,
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.config_init = rtl8221b_config_init,
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.config_aneg = rtl822x_config_aneg,
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+ .probe = rtl822x_probe,
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.read_status = rtl822x_read_status,
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.suspend = genphy_suspend,
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.resume = rtlgen_resume,
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@@ -1096,6 +1122,7 @@ static struct phy_driver realtek_drvs[]
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.get_features = rtl822x_get_features,
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.config_aneg = rtl822x_config_aneg,
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.config_init = rtl8221b_config_init,
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+ .probe = rtl822x_probe,
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.read_status = rtl822x_read_status,
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.suspend = genphy_suspend,
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.resume = rtlgen_resume,
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