mirror of
				git://git.openwrt.org/openwrt/openwrt.git
				synced 2025-10-31 14:04:26 -04:00 
			
		
		
		
	Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
		
			
				
	
	
		
			38 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			38 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 462a65a13cff2e04122df6a770d91ef1e301b359 Mon Sep 17 00:00:00 2001
 | |
| From: Youri Querry <youri.querry_1@nxp.com>
 | |
| Date: Thu, 19 Dec 2019 09:44:33 -0500
 | |
| Subject: [PATCH] soc: fsl: dpio: Enable ACP port in Linux QMAN driver
 | |
| 
 | |
| Setting the software portal configuration DE(dequeue stashing
 | |
| enable) bit. This should enable the ACP (Accelerator Coherency
 | |
| Port).
 | |
| 
 | |
| During test this improved performance on the LS2088a slightly. No
 | |
| effect on the LX2160a.
 | |
| 
 | |
| Signed-off-by: Youri Querry <youri.querry_1@nxp.com>
 | |
| ---
 | |
|  drivers/soc/fsl/dpio/qbman-portal.c | 4 ++--
 | |
|  1 file changed, 2 insertions(+), 2 deletions(-)
 | |
| 
 | |
| --- a/drivers/soc/fsl/dpio/qbman-portal.c
 | |
| +++ b/drivers/soc/fsl/dpio/qbman-portal.c
 | |
| @@ -299,7 +299,7 @@ struct qbman_swp *qbman_swp_init(const s
 | |
|  			1, /* mem stashing priority enable */
 | |
|  			1, /* mem stashing enable */
 | |
|  			1, /* dequeue stashing priority enable */
 | |
| -			0, /* dequeue stashing enable enable */
 | |
| +			1, /* dequeue stashing enable enable */
 | |
|  			0); /* EQCR_CI stashing priority enable */
 | |
|  	} else {
 | |
|  		memset(p->addr_cena, 0, 64 * 1024);
 | |
| @@ -313,7 +313,7 @@ struct qbman_swp *qbman_swp_init(const s
 | |
|  			1, /* mem stashing priority enable */
 | |
|  			1, /* mem stashing enable */
 | |
|  			1, /* dequeue stashing priority enable */
 | |
| -			0, /* dequeue stashing enable */
 | |
| +			1, /* dequeue stashing enable */
 | |
|  			0); /* EQCR_CI stashing priority enable */
 | |
|  		reg |= 1 << SWP_CFG_CPBS_SHIFT | /* memory-backed mode */
 | |
|  		       1 << SWP_CFG_VPM_SHIFT |  /* VDQCR read triggered mode */
 |