Olliver Schinagl f4849c0ab7 realtek: Fix CRC offloading for rtl83xx ... In rtl83xx_set_features we set bit 3 to enable, and bit 4 to disable checksuming. Looking at rtl93xx_set_features we however see that for both enable and disable the same bit is used (bit 4). This can't be right, especially as bit 4 for rtl83xx seems to be Collision threshold occupying 2 bits. Change this to make this more logical. Fixes: 9e8d62e421 ("realtek: enable CRC offloading") Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>		2022-10-29 11:18:04 +02:00
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arch/mips	realtek: use MIPS fw_init_cmdline()	2022-10-08 11:05:02 +02:00
Documentation/devicetree/bindings	realtek: timer driver: documentation	2022-10-23 22:33:08 +02:00
drivers	realtek: Fix CRC offloading for rtl83xx	2022-10-29 11:18:04 +02:00
include/dt-bindings/clock	realtek: add PLL DT binding includes	2022-08-28 11:03:34 +02:00