mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2025-11-03 14:34:27 -05:00
f025135f16
HiWiFi HC5861 has a GbE port which connected to the RTL8211E PHY chip. This patch adds the missing Realtek PHY driver package and sets the correct external PHYs base address to make it work again. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
119 lines
1.9 KiB
Plaintext
119 lines
1.9 KiB
Plaintext
#include "mt7620a_hiwifi_hc5x61.dtsi"
|
|
|
|
/ {
|
|
compatible = "hiwifi,hc5861", "hiwifi,hc5x61", "ralink,mt7620a-soc";
|
|
model = "HiWiFi HC5861";
|
|
|
|
aliases {
|
|
led-boot = &led_system;
|
|
led-failsafe = &led_system;
|
|
led-running = &led_system;
|
|
led-upgrade = &led_system;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_system: system {
|
|
label = "blue:system";
|
|
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan2g {
|
|
label = "blue:wlan2g";
|
|
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy1tpt";
|
|
};
|
|
|
|
internet {
|
|
label = "blue:internet";
|
|
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wlan5g {
|
|
label = "blue:wlan5g";
|
|
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "phy0tpt";
|
|
};
|
|
|
|
turbo {
|
|
label = "blue:turbo";
|
|
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
gpio_export {
|
|
compatible = "gpio-export";
|
|
#size-cells = <0>;
|
|
|
|
usbpower {
|
|
gpio-export,name = "usbpower";
|
|
gpio-export,output = <0>;
|
|
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
sdpower {
|
|
gpio-export,name = "sdpower";
|
|
gpio-export,output = <0>;
|
|
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
&ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
|
|
|
|
nvmem-cells = <&macaddr_factory_4>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
mediatek,portmap = "llllw";
|
|
|
|
port@5 {
|
|
status = "okay";
|
|
phy-handle = <&phy5>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
mdio-bus {
|
|
status = "okay";
|
|
|
|
phy5: ethernet-phy@5 {
|
|
reg = <5>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
};
|
|
};
|
|
|
|
&gsw {
|
|
mediatek,ephy-base = /bits/ 8 <12>;
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
wifi@0,0 {
|
|
compatible = "pci14c3,7662";
|
|
reg = <0x0000 0 0 0 0>;
|
|
nvmem-cells = <&eeprom_factory_8000>;
|
|
nvmem-cell-names = "eeprom";
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
};
|
|
};
|
|
|
|
&wmac {
|
|
pinctrl-names = "default", "pa_gpio";
|
|
pinctrl-0 = <&pa_pins>;
|
|
pinctrl-1 = <&pa_gpio_pins>;
|
|
};
|