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	Copy patches and kernel configs from kernel 6.6 to restore the default 6.1 kernel support files. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
		
			
				
	
	
		
			207 lines
		
	
	
		
			6.0 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			207 lines
		
	
	
		
			6.0 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001
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| From: John Crispin <john@phrozen.org>
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| Date: Sat, 23 Jun 2018 15:07:23 +0200
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| Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF
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| 
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| With the ath79 target getting converted to pure OF, we can drop all the
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| platform data code and add the missing OF bits to the driver. We also add
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| a irq domain for the PCI/e controllers cascade, thus making it usable from
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| dts files.
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| 
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| Signed-off-by: John Crispin <john@phrozen.org>
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| ---
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|  arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++-----------------------
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|  1 file changed, 41 insertions(+), 41 deletions(-)
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| 
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| --- a/arch/mips/pci/pci-ar71xx.c
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| +++ b/arch/mips/pci/pci-ar71xx.c
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| @@ -15,8 +15,11 @@
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|  #include <linux/pci.h>
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|  #include <linux/pci_regs.h>
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|  #include <linux/interrupt.h>
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| +#include <linux/irqchip/chained_irq.h>
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|  #include <linux/init.h>
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|  #include <linux/platform_device.h>
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| +#include <linux/of_irq.h>
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| +#include <linux/of_pci.h>
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|  
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|  #include <asm/mach-ath79/ar71xx_regs.h>
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|  #include <asm/mach-ath79/ath79.h>
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| @@ -46,12 +49,13 @@
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|  #define AR71XX_PCI_IRQ_COUNT		5
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|  
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|  struct ar71xx_pci_controller {
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| +	struct device_node *np;
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|  	void __iomem *cfg_base;
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|  	int irq;
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| -	int irq_base;
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|  	struct pci_controller pci_ctrl;
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|  	struct resource io_res;
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|  	struct resource mem_res;
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| +	struct irq_domain *domain;
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|  };
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|  
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|  /* Byte lane enable bits */
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| @@ -225,29 +229,30 @@ static struct pci_ops ar71xx_pci_ops = {
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|  
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|  static void ar71xx_pci_irq_handler(struct irq_desc *desc)
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|  {
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| -	struct ar71xx_pci_controller *apc;
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|  	void __iomem *base = ath79_reset_base;
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| +	struct irq_chip *chip = irq_desc_get_chip(desc);
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| +	struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
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|  	u32 pending;
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|  
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| -	apc = irq_desc_get_handler_data(desc);
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| -
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| +	chained_irq_enter(chip, desc);
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|  	pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
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|  		  __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
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|  
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|  	if (pending & AR71XX_PCI_INT_DEV0)
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| -		generic_handle_irq(apc->irq_base + 0);
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| +		generic_handle_irq(irq_linear_revmap(apc->domain, 1));
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|  
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|  	else if (pending & AR71XX_PCI_INT_DEV1)
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| -		generic_handle_irq(apc->irq_base + 1);
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| +		generic_handle_irq(irq_linear_revmap(apc->domain, 2));
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|  
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|  	else if (pending & AR71XX_PCI_INT_DEV2)
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| -		generic_handle_irq(apc->irq_base + 2);
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| +		generic_handle_irq(irq_linear_revmap(apc->domain, 3));
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|  
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|  	else if (pending & AR71XX_PCI_INT_CORE)
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| -		generic_handle_irq(apc->irq_base + 4);
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| +		generic_handle_irq(irq_linear_revmap(apc->domain, 4));
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|  
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|  	else
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|  		spurious_interrupt();
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| +	chained_irq_exit(chip, desc);
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|  }
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|  
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|  static void ar71xx_pci_irq_unmask(struct irq_data *d)
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| @@ -258,7 +263,7 @@ static void ar71xx_pci_irq_unmask(struct
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|  	u32 t;
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|  
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|  	apc = irq_data_get_irq_chip_data(d);
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| -	irq = d->irq - apc->irq_base;
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| +	irq = irq_linear_revmap(apc->domain, d->irq);
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|  
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|  	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
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|  	__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
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| @@ -275,7 +280,7 @@ static void ar71xx_pci_irq_mask(struct i
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|  	u32 t;
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|  
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|  	apc = irq_data_get_irq_chip_data(d);
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| -	irq = d->irq - apc->irq_base;
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| +	irq = irq_linear_revmap(apc->domain, d->irq);
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|  
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|  	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
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|  	__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
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| @@ -291,24 +296,31 @@ static struct irq_chip ar71xx_pci_irq_ch
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|  	.irq_mask_ack	= ar71xx_pci_irq_mask,
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|  };
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|  
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| +static int ar71xx_pci_irq_map(struct irq_domain *d,
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| +			      unsigned int irq, irq_hw_number_t hw)
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| +{
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| +	struct ar71xx_pci_controller *apc = d->host_data;
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| +
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| +	irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
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| +	irq_set_chip_data(irq, apc);
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| +
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| +	return 0;
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| +}
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| +
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| +static const struct irq_domain_ops ar71xx_pci_domain_ops = {
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| +	.xlate = irq_domain_xlate_onecell,
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| +	.map = ar71xx_pci_irq_map,
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| +};
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| +
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|  static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
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|  {
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|  	void __iomem *base = ath79_reset_base;
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| -	int i;
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|  
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|  	__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
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|  	__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
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|  
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| -	BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT);
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| -
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| -	apc->irq_base = ATH79_PCI_IRQ_BASE;
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| -	for (i = apc->irq_base;
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| -	     i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) {
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| -		irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
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| -					 handle_level_irq);
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| -		irq_set_chip_data(i, apc);
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| -	}
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| -
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| +	apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
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| +					    &ar71xx_pci_domain_ops, apc);
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|  	irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
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|  					 apc);
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|  }
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| @@ -325,10 +337,14 @@ static void ar71xx_pci_reset(void)
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|  	mdelay(100);
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|  }
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|  
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| +static const struct of_device_id ar71xx_pci_ids[] = {
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| +	{ .compatible = "qca,ar7100-pci" },
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| +	{},
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| +};
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| +
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|  static int ar71xx_pci_probe(struct platform_device *pdev)
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|  {
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|  	struct ar71xx_pci_controller *apc;
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| -	struct resource *res;
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|  	u32 t;
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|  
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|  	apc = devm_kzalloc(&pdev->dev, sizeof(struct ar71xx_pci_controller),
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| @@ -345,26 +361,6 @@ static int ar71xx_pci_probe(struct platf
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|  	if (apc->irq < 0)
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|  		return -EINVAL;
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|  
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| -	res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
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| -	if (!res)
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| -		return -EINVAL;
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| -
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| -	apc->io_res.parent = res;
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| -	apc->io_res.name = "PCI IO space";
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| -	apc->io_res.start = res->start;
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| -	apc->io_res.end = res->end;
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| -	apc->io_res.flags = IORESOURCE_IO;
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| -
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| -	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
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| -	if (!res)
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| -		return -EINVAL;
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| -
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| -	apc->mem_res.parent = res;
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| -	apc->mem_res.name = "PCI memory space";
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| -	apc->mem_res.start = res->start;
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| -	apc->mem_res.end = res->end;
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| -	apc->mem_res.flags = IORESOURCE_MEM;
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| -
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|  	ar71xx_pci_reset();
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|  
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|  	/* setup COMMAND register */
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| @@ -377,9 +373,11 @@ static int ar71xx_pci_probe(struct platf
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|  
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|  	ar71xx_pci_irq_init(apc);
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|  
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| +	apc->np = pdev->dev.of_node;
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|  	apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
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|  	apc->pci_ctrl.mem_resource = &apc->mem_res;
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|  	apc->pci_ctrl.io_resource = &apc->io_res;
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| +	pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node);
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|  
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|  	register_pci_controller(&apc->pci_ctrl);
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|  
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| @@ -390,6 +388,7 @@ static struct platform_driver ar71xx_pci
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|  	.probe = ar71xx_pci_probe,
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|  	.driver = {
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|  		.name = "ar71xx-pci",
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| +		.of_match_table = of_match_ptr(ar71xx_pci_ids),
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|  	},
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|  };
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|  
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