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	This updates the GCC to the next minor release which fixes +213 bugs. Tested on ARMv6, ARMv7, MIPS R2, x86 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
		
			
				
	
	
		
			176 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			176 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From c0c62fa4256f805389f16ebfc4a60cf789129b50 Mon Sep 17 00:00:00 2001
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| From: BangLang Huang <banglang.huang@foxmail.com>
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| Date: Wed, 9 Nov 2016 10:36:49 +0800
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| Subject: [PATCH] libffi: fix MIPS softfloat build issue
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| 
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| Backported from github.com/libffi/libffi#272
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| 
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| Signed-off-by: BangLang Huang <banglang.huang@foxmail.com>
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| Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
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| ---
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|  libffi/src/mips/n32.S | 17 +++++++++++++++++
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|  libffi/src/mips/o32.S | 17 +++++++++++++++++
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|  2 files changed, 34 insertions(+)
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| 
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| diff --git a/libffi/src/mips/n32.S b/libffi/src/mips/n32.S
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| index c6985d30a6f..8f25994773c 100644
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| --- a/libffi/src/mips/n32.S
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| +++ b/libffi/src/mips/n32.S
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| @@ -107,6 +107,16 @@ loadregs:
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|  
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|  	REG_L	t6, 3*FFI_SIZEOF_ARG($fp)  # load the flags word into t6.
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|  
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| +#ifdef __mips_soft_float
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| +	REG_L	a0, 0*FFI_SIZEOF_ARG(t9)
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| +	REG_L	a1, 1*FFI_SIZEOF_ARG(t9)
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| +	REG_L	a2, 2*FFI_SIZEOF_ARG(t9)
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| +	REG_L	a3, 3*FFI_SIZEOF_ARG(t9)
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| +	REG_L	a4, 4*FFI_SIZEOF_ARG(t9)
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| +	REG_L	a5, 5*FFI_SIZEOF_ARG(t9)
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| +	REG_L	a6, 6*FFI_SIZEOF_ARG(t9)
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| +	REG_L	a7, 7*FFI_SIZEOF_ARG(t9)
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| +#else
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|  	and	t4, t6, ((1<<FFI_FLAG_BITS)-1)
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|  	REG_L	a0, 0*FFI_SIZEOF_ARG(t9)
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|  	beqz	t4, arg1_next
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| @@ -193,6 +203,7 @@ arg7_next:
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|  arg8_doublep:	
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|   	l.d	$f19, 7*FFI_SIZEOF_ARG(t9)	
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|  arg8_next:	
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| +#endif
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|  
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|  callit:		
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|  	# Load the function pointer
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| @@ -214,6 +225,7 @@ retint:
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|  	b	epilogue
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|  
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|  retfloat:
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| +#ifndef __mips_soft_float
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|  	bne     t6, FFI_TYPE_FLOAT, retdouble
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|  	jal	t9
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|  	REG_L	t4, 4*FFI_SIZEOF_ARG($fp)
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| @@ -272,6 +284,7 @@ retstruct_f_d:
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|  	s.s	$f0, 0(t4)
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|  	s.d	$f2, 8(t4)
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|  	b	epilogue
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| +#endif
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|  
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|  retstruct_d_soft:
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|  	bne	t6, FFI_TYPE_STRUCT_D_SOFT, retstruct_f_soft
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| @@ -429,6 +442,7 @@ ffi_closure_N32:
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|  	REG_S	a6, A6_OFF2($sp)
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|  	REG_S	a7, A7_OFF2($sp)
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|  
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| +#ifndef __mips_soft_float
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|  	# Store all possible float/double registers.
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|  	s.d	$f12, F12_OFF2($sp)
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|  	s.d	$f13, F13_OFF2($sp)
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| @@ -438,6 +452,7 @@ ffi_closure_N32:
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|  	s.d	$f17, F17_OFF2($sp)
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|  	s.d	$f18, F18_OFF2($sp)
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|  	s.d	$f19, F19_OFF2($sp)
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| +#endif
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|  
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|  	# Call ffi_closure_mips_inner_N32 to do the real work.
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|  	LA	t9, ffi_closure_mips_inner_N32
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| @@ -458,6 +473,7 @@ cls_retint:
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|  	b	cls_epilogue
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|  
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|  cls_retfloat:
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| +#ifndef __mips_soft_float
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|  	bne     v0, FFI_TYPE_FLOAT, cls_retdouble
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|  	l.s	$f0, V0_OFF2($sp)
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|  	b	cls_epilogue
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| @@ -500,6 +516,7 @@ cls_retstruct_f_d:
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|  	l.s	$f0, V0_OFF2($sp)
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|  	l.d	$f2, V1_OFF2($sp)
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|  	b	cls_epilogue
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| +#endif
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|  	
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|  cls_retstruct_small2:	
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|  	REG_L	v0, V0_OFF2($sp)
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| diff --git a/libffi/src/mips/o32.S b/libffi/src/mips/o32.S
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| index eb279813a76..1aff4b14814 100644
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| --- a/libffi/src/mips/o32.S
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| +++ b/libffi/src/mips/o32.S
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| @@ -82,13 +82,16 @@ sixteen:
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|  		
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|  	ADDU	$sp, 4 * FFI_SIZEOF_ARG		# adjust $sp to new args
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|  
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| +#ifndef __mips_soft_float
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|  	bnez	t0, pass_d			# make it quick for int
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| +#endif
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|  	REG_L	a0, 0*FFI_SIZEOF_ARG($sp)	# just go ahead and load the
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|  	REG_L	a1, 1*FFI_SIZEOF_ARG($sp)	# four regs.
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|  	REG_L	a2, 2*FFI_SIZEOF_ARG($sp)
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|  	REG_L	a3, 3*FFI_SIZEOF_ARG($sp)
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|  	b	call_it
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|  
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| +#ifndef __mips_soft_float
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|  pass_d:
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|  	bne	t0, FFI_ARGS_D, pass_f
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|  	l.d	$f12, 0*FFI_SIZEOF_ARG($sp)	# load $fp regs from args
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| @@ -130,6 +133,7 @@ pass_f_d:
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|   #	bne	t0, FFI_ARGS_F_D, call_it
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|  	l.s	$f12, 0*FFI_SIZEOF_ARG($sp)	# load $fp regs from args
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|  	l.d	$f14, 2*FFI_SIZEOF_ARG($sp)	# passing double and float
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| +#endif
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|  
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|  call_it:	
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|  	# Load the function pointer
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| @@ -158,14 +162,23 @@ retfloat:
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|  	bne     t2, FFI_TYPE_FLOAT, retdouble
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|  	jalr	t9
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|  	REG_L	t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
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| +#ifndef __mips_soft_float
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|  	s.s	$f0, 0(t0)
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| +#else
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| +	REG_S v0, 0(t0)
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| +#endif
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|  	b	epilogue
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|  
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|  retdouble:	
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|  	bne	t2, FFI_TYPE_DOUBLE, noretval
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|  	jalr	t9
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|  	REG_L	t0, SIZEOF_FRAME + 4*FFI_SIZEOF_ARG($fp)
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| +#ifndef __mips_soft_float
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|  	s.d	$f0, 0(t0)
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| +#else
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| +	REG_S v1, 4(t0)
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| +	REG_S v0, 0(t0)
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| +#endif
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|  	b	epilogue
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|  	
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|  noretval:	
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| @@ -261,9 +274,11 @@ $LCFI7:
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|  	li	$13, 1		# FFI_O32
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|  	bne	$16, $13, 1f	# Skip fp save if FFI_O32_SOFT_FLOAT
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|  	
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| +#ifndef __mips_soft_float
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|  	# Store all possible float/double registers.
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|  	s.d	$f12, FA_0_0_OFF2($fp)
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|  	s.d	$f14, FA_1_0_OFF2($fp)
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| +#endif
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|  1:	
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|  	# Call ffi_closure_mips_inner_O32 to do the work.
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|  	la	t9, ffi_closure_mips_inner_O32
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| @@ -281,6 +296,7 @@ $LCFI7:
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|  	li	$13, 1		# FFI_O32
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|  	bne	$16, $13, 1f	# Skip fp restore if FFI_O32_SOFT_FLOAT
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|  
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| +#ifndef __mips_soft_float
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|  	li	$9, FFI_TYPE_FLOAT
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|  	l.s	$f0, V0_OFF2($fp)
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|  	beq	$8, $9, closure_done
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| @@ -288,6 +304,7 @@ $LCFI7:
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|  	li	$9, FFI_TYPE_DOUBLE
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|  	l.d	$f0, V0_OFF2($fp)
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|  	beq	$8, $9, closure_done
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| +#endif
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|  1:	
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|  	REG_L	$3, V1_OFF2($fp)
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|  	REG_L	$2, V0_OFF2($fp)
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| -- 
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| 2.16.3
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| 
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