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Changelog: * https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.5 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46598
73 lines
2.1 KiB
Diff
73 lines
2.1 KiB
Diff
From e9051f5dbc26e78f91cf23ca79ae4c8471119667 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
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Date: Fri, 18 Jul 2014 15:26:08 -0300
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Subject: [PATCH] ARM: sun7i: Add mod1 clock nodes
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This commit adds all the mod1 clocks available on A20 to its device
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tree. This list was created by looking at the A20 user manual.
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Not-signed-off-by: Emilio López <emilio@elopez.com.ar>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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arch/arm/boot/dts/sun7i-a20.dtsi | 39 +++++++++++++++++++++++++++++++++++++++
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1 file changed, 39 insertions(+)
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--- a/arch/arm/boot/dts/sun7i-a20.dtsi
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+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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@@ -447,6 +447,29 @@
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clock-output-names = "ir1";
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};
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+ iis0_clk: clk@01c200b8 {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-mod1-clk";
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+ reg = <0x01c200b8 0x4>;
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+ clocks = <&pll2 0>, <&pll2 1>, <&pll2 2>, <&pll2 3>;
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+ clock-output-names = "iis0";
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+ };
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+
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+ ac97_clk: clk@01c200bc {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-mod1-clk";
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+ reg = <0x01c200bc 0x4>;
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+ clocks = <&pll2 3>, <&pll2 2>, <&pll2 1>, <&pll2 0>;
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+ clock-output-names = "ac97";
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+ };
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+
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+ spdif_clk: clk@01c200c0 {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-mod1-clk";
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+ reg = <0x01c200c0 0x4>;
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+ clocks = <&pll2 0>, <&pll2 1>, <&pll2 2>, <&pll2 3>;
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+ clock-output-names = "spdif";
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+ };
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usb_clk: clk@01c200cc {
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#clock-cells = <1>;
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#reset-cells = <1>;
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@@ -464,6 +487,22 @@
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clock-output-names = "spi3";
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};
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+ iis1_clk: clk@01c200d8 {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-mod1-clk";
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+ reg = <0x01c200d8 0x4>;
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+ clocks = <&pll2 0>, <&pll2 1>, <&pll2 2>, <&pll2 3>;
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+ clock-output-names = "iis1";
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+ };
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+
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+ iis2_clk: clk@01c200dc {
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+ #clock-cells = <0>;
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+ compatible = "allwinner,sun4i-a10-mod1-clk";
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+ reg = <0x01c200dc 0x4>;
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+ clocks = <&pll2 0>, <&pll2 1>, <&pll2 2>, <&pll2 3>;
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+ clock-output-names = "iis2";
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+ };
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+
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codec_clk: clk@01c20140 {
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#clock-cells = <0>;
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compatible = "allwinner,sun4i-a10-codec-clk";
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