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			84 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			84 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  Atheros PB42 board support
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|  *
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|  *  Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org>
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|  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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|  *
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|  *  This program is free software; you can redistribute it and/or modify it
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|  *  under the terms of the GNU General Public License version 2 as published
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|  *  by the Free Software Foundation.
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|  */
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| 
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| #include <asm/mach-ath79/ath79.h>
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| 
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| #include "dev-eth.h"
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| #include "dev-gpio-buttons.h"
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| #include "dev-m25p80.h"
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| #include "dev-usb.h"
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| #include "machtypes.h"
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| #include "pci.h"
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| 
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| #define PB42_KEYS_POLL_INTERVAL		20	/* msecs */
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| #define PB42_KEYS_DEBOUNCE_INTERVAL	(3 * PB42_KEYS_POLL_INTERVAL)
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| 
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| #define PB42_GPIO_BTN_SW4	8
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| #define PB42_GPIO_BTN_SW5	3
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| 
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| static struct gpio_keys_button pb42_gpio_keys[] __initdata = {
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| 	{
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| 		.desc		= "sw4",
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| 		.type		= EV_KEY,
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| 		.code		= BTN_0,
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| 		.debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL,
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| 		.gpio		= PB42_GPIO_BTN_SW4,
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| 		.active_low	= 1,
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| 	}, {
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| 		.desc		= "sw5",
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| 		.type		= EV_KEY,
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| 		.code		= BTN_1,
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| 		.debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL,
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| 		.gpio		= PB42_GPIO_BTN_SW5,
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| 		.active_low	= 1,
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| 	}
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| };
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| 
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| static const char *pb42_part_probes[] = {
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| 	"RedBoot",
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| 	NULL,
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| };
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| 
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| static struct flash_platform_data pb42_flash_data = {
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| 	.part_probes	= pb42_part_probes,
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| };
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| 
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| #define PB42_WAN_PHYMASK	BIT(20)
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| #define PB42_LAN_PHYMASK	(BIT(16) | BIT(17) | BIT(18) | BIT(19))
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| #define PB42_MDIO_PHYMASK	(PB42_LAN_PHYMASK | PB42_WAN_PHYMASK)
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| 
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| static void __init pb42_init(void)
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| {
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| 	ath79_register_m25p80(&pb42_flash_data);
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| 
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| 	ath79_register_mdio(0, ~PB42_MDIO_PHYMASK);
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| 
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| 	ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
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| 	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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| 	ath79_eth0_data.phy_mask = PB42_WAN_PHYMASK;
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| 
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| 	ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1);
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| 	ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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| 	ath79_eth1_data.speed = SPEED_100;
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| 	ath79_eth1_data.duplex = DUPLEX_FULL;
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| 
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| 	ath79_register_eth(0);
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| 	ath79_register_eth(1);
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| 
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| 	ath79_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL,
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| 					ARRAY_SIZE(pb42_gpio_keys),
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| 					pb42_gpio_keys);
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| 
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| 	ath79_register_pci();
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| }
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| 
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| MIPS_MACHINE(ATH79_MACH_PB42, "PB42", "Atheros PB42", pb42_init);
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