mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2025-10-31 05:54:26 -04:00
cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
37 lines
1.4 KiB
Diff
37 lines
1.4 KiB
Diff
From 96412158397ca0e41db1eb7cec4f51a2280d1bf1 Mon Sep 17 00:00:00 2001
|
|
From: Mihai Serban <mihai.serban@nxp.com>
|
|
Date: Thu, 27 Apr 2017 18:47:42 +0300
|
|
Subject: [PATCH] MLK-14935: ASoC: fsl_sai: Fix mixing initialization data with
|
|
actual audio samples
|
|
|
|
When starting a playback the initialization data used to reduce underruns
|
|
was send to the transmit data register after the DMA requests were enabled.
|
|
This patch moves the initialization phase before enabling the DMA so the
|
|
data is transmitted in correct order.
|
|
|
|
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
|
|
---
|
|
sound/soc/fsl/fsl_sai.c | 5 ++---
|
|
1 file changed, 2 insertions(+), 3 deletions(-)
|
|
|
|
--- a/sound/soc/fsl/fsl_sai.c
|
|
+++ b/sound/soc/fsl/fsl_sai.c
|
|
@@ -594,15 +594,14 @@ static int fsl_sai_trigger(struct snd_pc
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
case SNDRV_PCM_TRIGGER_RESUME:
|
|
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
|
- regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
|
|
- FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
|
|
-
|
|
for (i = 0; tx && i < channels; i++)
|
|
regmap_write(sai->regmap, FSL_SAI_TDR0, 0x0);
|
|
if (tx)
|
|
udelay(10);
|
|
|
|
regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
|
|
+ FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
|
|
+ regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
|
|
FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
|
|
regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx),
|
|
FSL_SAI_CSR_SE, FSL_SAI_CSR_SE);
|