mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2025-10-30 13:34:27 -04:00
3020d9f8b4
Don't report speed in case link is down. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
47 lines
1.5 KiB
Diff
47 lines
1.5 KiB
Diff
From cbfed00575d15eafd85efd9619b7ecc0836a4aa7 Mon Sep 17 00:00:00 2001
|
|
From: Alexander Couzens <lynxis@fe80.eu>
|
|
Date: Sat, 13 Aug 2022 14:42:12 +0200
|
|
Subject: [PATCH 04/10] net: mtk_sgmii: implement mtk_pcs_ops
|
|
|
|
Implement mtk_pcs_ops for the SGMII pcs to read the current state
|
|
of the hardware.
|
|
|
|
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
|
|
[added DUPLEX_FULL]
|
|
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
|
|
---
|
|
drivers/net/ethernet/mediatek/mtk_sgmii.c | 15 +++++++++++++++
|
|
1 file changed, 15 insertions(+)
|
|
|
|
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
|
|
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
|
|
@@ -122,10 +122,28 @@ static void mtk_pcs_link_up(struct phyli
|
|
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
|
|
}
|
|
|
|
+static void mtk_pcs_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state)
|
|
+{
|
|
+ struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
|
|
+ unsigned int val;
|
|
+
|
|
+ regmap_read(mpcs->regmap, SGMSYS_PCS_CONTROL_1, &val);
|
|
+ state->an_complete = !!(val & SGMII_AN_COMPLETE);
|
|
+ state->link = !!(val & SGMII_LINK_STATYS);
|
|
+ if (!state->link)
|
|
+ return;
|
|
+
|
|
+ regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
|
|
+ state->speed = val & RG_PHY_SPEED_3_125G ? SPEED_2500 : SPEED_1000;
|
|
+ state->duplex = DUPLEX_FULL;
|
|
+ state->pause = 0;
|
|
+}
|
|
+
|
|
static const struct phylink_pcs_ops mtk_pcs_ops = {
|
|
.pcs_config = mtk_pcs_config,
|
|
.pcs_an_restart = mtk_pcs_restart_an,
|
|
.pcs_link_up = mtk_pcs_link_up,
|
|
+ .pcs_get_state = mtk_pcs_get_state,
|
|
};
|
|
|
|
int mtk_sgmii_init(struct mtk_sgmii *ss, struct device_node *r, u32 ana_rgc3)
|