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			131 lines
		
	
	
		
			5.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			131 lines
		
	
	
		
			5.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| --- a/drivers/ssb/pci.c
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| +++ b/drivers/ssb/pci.c
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| @@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb
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|  static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
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|  {
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|  	int i;
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| -	u16 v;
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| +	u16 v, o;
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| +	u16 pwr_info_offset[] = {
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| +		SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
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| +		SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
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| +	};
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| +	BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
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| +			ARRAY_SIZE(out->core_pwr_info));
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|  
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|  	/* extract the MAC address */
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|  	for (i = 0; i < 3; i++) {
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| @@ -607,6 +613,38 @@ static void sprom_extract_r8(struct ssb_
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|  	memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
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|  	       sizeof(out->antenna_gain.ghz5));
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|  
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| +	/* Extract cores power info info */
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| +	for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
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| +		o = pwr_info_offset[i];
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| +		SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
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| +			SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
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| +		SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
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| +			SSB_SPROM8_2G_MAXP, 0);
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| +
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| +		SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
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| +
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| +		SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
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| +			SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
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| +		SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
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| +			SSB_SPROM8_5G_MAXP, 0);
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| +		SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
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| +			SSB_SPROM8_5GH_MAXP, 0);
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| +		SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
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| +			SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
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| +
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| +		SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
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| +		SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
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| +	}
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| +
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|  	/* Extract FEM info */
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|  	SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
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|  		SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
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| --- a/include/linux/ssb/ssb.h
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| +++ b/include/linux/ssb/ssb.h
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| @@ -16,6 +16,12 @@ struct pcmcia_device;
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|  struct ssb_bus;
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|  struct ssb_driver;
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|  
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| +struct ssb_sprom_core_pwr_info {
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| +	u8 itssi_2g, itssi_5g;
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| +	u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
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| +	u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
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| +};
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| +
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|  struct ssb_sprom {
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|  	u8 revision;
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|  	u8 il0mac[6];		/* MAC address for 802.11b/g */
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| @@ -82,6 +88,8 @@ struct ssb_sprom {
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|  	u16 boardflags2_hi;	/* Board flags (bits 48-63) */
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|  	/* TODO store board flags in a single u64 */
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|  
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| +	struct ssb_sprom_core_pwr_info core_pwr_info[4];
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| +
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|  	/* Antenna gain values for up to 4 antennas
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|  	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
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|  	 * loss in the connectors is bigger than the gain. */
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| --- a/include/linux/ssb/ssb_regs.h
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| +++ b/include/linux/ssb/ssb_regs.h
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| @@ -449,6 +449,39 @@
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|  #define SSB_SPROM8_TS_SLP_OPT_CORRX	0x00B6
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|  #define SSB_SPROM8_FOC_HWIQ_IQSWP	0x00B8
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|  #define SSB_SPROM8_PHYCAL_TEMPDELTA	0x00BA
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| +
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| +/* There are 4 blocks with power info sharing the same layout */
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| +#define SSB_SROM8_PWR_INFO_CORE0	0x00C0
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| +#define SSB_SROM8_PWR_INFO_CORE1	0x00E0
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| +#define SSB_SROM8_PWR_INFO_CORE2	0x0100
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| +#define SSB_SROM8_PWR_INFO_CORE3	0x0120
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| +
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| +#define SSB_SROM8_2G_MAXP_ITSSI		0x00
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| +#define  SSB_SPROM8_2G_MAXP		0x00FF
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| +#define  SSB_SPROM8_2G_ITSSI		0xFF00
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| +#define  SSB_SPROM8_2G_ITSSI_SHIFT	8
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| +#define SSB_SROM8_2G_PA_0		0x02	/* 2GHz power amp settings */
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| +#define SSB_SROM8_2G_PA_1		0x04
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| +#define SSB_SROM8_2G_PA_2		0x06
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| +#define SSB_SROM8_5G_MAXP_ITSSI		0x08	/* 5GHz ITSSI and 5.3GHz Max Power */
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| +#define  SSB_SPROM8_5G_MAXP		0x00FF
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| +#define  SSB_SPROM8_5G_ITSSI		0xFF00
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| +#define  SSB_SPROM8_5G_ITSSI_SHIFT	8
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| +#define SSB_SPROM8_5GHL_MAXP		0x0A	/* 5.2GHz and 5.8GHz Max Power */
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| +#define  SSB_SPROM8_5GH_MAXP		0x00FF
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| +#define  SSB_SPROM8_5GL_MAXP		0xFF00
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| +#define  SSB_SPROM8_5GL_MAXP_SHIFT	8
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| +#define SSB_SROM8_5G_PA_0		0x0C	/* 5.3GHz power amp settings */
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| +#define SSB_SROM8_5G_PA_1		0x0E
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| +#define SSB_SROM8_5G_PA_2		0x10
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| +#define SSB_SROM8_5GL_PA_0		0x12	/* 5.2GHz power amp settings */
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| +#define SSB_SROM8_5GL_PA_1		0x14
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| +#define SSB_SROM8_5GL_PA_2		0x16
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| +#define SSB_SROM8_5GH_PA_0		0x18	/* 5.8GHz power amp settings */
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| +#define SSB_SROM8_5GH_PA_1		0x1A
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| +#define SSB_SROM8_5GH_PA_2		0x1C
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| +
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| +/* TODO: Make it deprecated */
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|  #define SSB_SPROM8_MAXP_BG		0x00C0  /* Max Power 2GHz in path 1 */
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|  #define  SSB_SPROM8_MAXP_BG_MASK	0x00FF  /* Mask for Max Power 2GHz */
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|  #define  SSB_SPROM8_ITSSI_BG		0xFF00	/* Mask for path 1 itssi_bg */
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| @@ -473,6 +506,7 @@
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|  #define SSB_SPROM8_PA1HIB0		0x00D8	/* 5.8GHz power amp settings */
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|  #define SSB_SPROM8_PA1HIB1		0x00DA
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|  #define SSB_SPROM8_PA1HIB2		0x00DC
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| +
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|  #define SSB_SPROM8_CCK2GPO		0x0140	/* CCK power offset */
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|  #define SSB_SPROM8_OFDM2GPO		0x0142	/* 2.4GHz OFDM power offset */
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|  #define SSB_SPROM8_OFDM5GPO		0x0146	/* 5.3GHz OFDM power offset */
 |