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Add support for Fudan Micro FM25S01BI3 SPI NAND. Link: https://www.fmsh.com/nvm/FM25S01BI3_ds_eng.pdf Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com> Link: https://github.com/openwrt/openwrt/pull/20872 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
118 lines
3.3 KiB
Diff
118 lines
3.3 KiB
Diff
To: Miquel Raynal <miquel.raynal@bootlin.com>,
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Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>,
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Tudor Ambarus <tudor.ambarus@linaro.org>, Mark Brown <broonie@kernel.org>
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Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org
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From: Mikhail Zhilkin <csharper2005@gmail.com>
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Subject: [PATCH] mtd: spinand: add support for FudanMicro FM25S01BI3
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Add support for FudanMicro FM25S01BI3 SPI NAND.
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Link: https://www.fmsh.com/nvm/FM25S01BI3_ds_eng.pdf
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Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
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Link: https://lore.kernel.org/linux-mtd/130e0f3f-93e4-47cf-82f0-93ba58a3a670@gmail.com
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---
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drivers/mtd/nand/spi/fmsh.c | 72 +++++++++++++++++++++++++++++++++++++
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1 file changed, 72 insertions(+)
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--- a/drivers/mtd/nand/spi/fmsh.c
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+++ b/drivers/mtd/nand/spi/fmsh.c
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@@ -9,6 +9,13 @@
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#include <linux/kernel.h>
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#include <linux/mtd/spinand.h>
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+#define FM25S01BI3_STATUS_ECC_MASK (7 << 4)
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+ #define FM25S01BI3_STATUS_ECC_NO_BITFLIPS (0 << 4)
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+ #define FM25S01BI3_STATUS_ECC_1_3_BITFLIPS (1 << 4)
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+ #define FM25S01BI3_STATUS_ECC_UNCOR_ERROR (2 << 4)
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+ #define FM25S01BI3_STATUS_ECC_4_6_BITFLIPS (3 << 4)
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+ #define FM25S01BI3_STATUS_ECC_7_8_BITFLIPS (5 << 4)
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+
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#define SPINAND_MFR_FMSH 0xA1
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static SPINAND_OP_VARIANTS(read_cache_variants,
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@@ -45,11 +52,66 @@ static int fm25s01a_ooblayout_free(struc
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return 0;
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}
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+static int fm25s01bi3_ecc_get_status(struct spinand_device *spinand,
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+ u8 status)
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+{
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+ switch (status & FM25S01BI3_STATUS_ECC_MASK) {
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+ case FM25S01BI3_STATUS_ECC_NO_BITFLIPS:
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+ return 0;
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+
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+ case FM25S01BI3_STATUS_ECC_UNCOR_ERROR:
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+ return -EBADMSG;
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+
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+ case FM25S01BI3_STATUS_ECC_1_3_BITFLIPS:
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+ return 3;
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+
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+ case FM25S01BI3_STATUS_ECC_4_6_BITFLIPS:
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+ return 6;
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+
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+ case FM25S01BI3_STATUS_ECC_7_8_BITFLIPS:
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+ return 8;
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+
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+ default:
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+ break;
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+ }
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+
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+ return -EINVAL;
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+}
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+
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+static int fm25s01bi3_ooblayout_ecc(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ region->offset = 64;
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+ region->length = 64;
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+
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+ return 0;
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+}
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+
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+static int fm25s01bi3_ooblayout_free(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section > 3)
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+ return -ERANGE;
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+
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+ region->offset = (16 * section) + 4;
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+ region->length = 12;
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+
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+ return 0;
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+}
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+
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static const struct mtd_ooblayout_ops fm25s01a_ooblayout = {
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.ecc = fm25s01a_ooblayout_ecc,
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.free = fm25s01a_ooblayout_free,
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};
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+static const struct mtd_ooblayout_ops fm25s01bi3_ooblayout = {
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+ .ecc = fm25s01bi3_ooblayout_ecc,
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+ .free = fm25s01bi3_ooblayout_free,
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+};
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+
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static const struct spinand_info fmsh_spinand_table[] = {
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SPINAND_INFO("FM25S01A",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
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@@ -60,6 +122,16 @@ static const struct spinand_info fmsh_sp
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
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+ SPINAND_INFO("FM25S01BI3",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xd4),
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&fm25s01bi3_ooblayout,
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+ fm25s01bi3_ecc_get_status)),
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};
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static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {
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