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d7f777b41c
Backport fix for premature SPI CS deassertion on RX-only transactions from linux v6.18, which is needed for bmips (bcm63xx). Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
60 lines
2.1 KiB
Diff
60 lines
2.1 KiB
Diff
From fd9862f726aedbc2f29a29916cabed7bcf5cadb6 Mon Sep 17 00:00:00 2001
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From: Hang Zhou <929513338@qq.com>
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Date: Mon, 17 Nov 2025 01:08:35 +1100
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Subject: [PATCH] spi: bcm63xx: fix premature CS deassertion on RX-only
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transactions
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On BCM6358 (and also observed on BCM6368) the controller appears to
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only generate as many SPI clocks as bytes that have been written into
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the TX FIFO. For RX-only transfers the driver programs the transfer
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length in SPI_MSG_CTL but does not write anything into the FIFO, so
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chip select is deasserted early and the RX transfer segment is never
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fully clocked in.
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A concrete failing case is a three-transfer MAC address read from
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SPI-NOR:
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- TX 0x03 (read command)
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- TX 3-byte address
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- RX 6 bytes (MAC)
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In contrast, a two-transfer JEDEC-ID read (0x9f + 6-byte RX) works
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because the driver uses prepend_len and writes dummy bytes into the
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TX FIFO for the RX part.
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Fix this by writing 0xff dummy bytes into the TX FIFO for RX-only
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segments so that the number of bytes written to the FIFO matches the
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total message length seen by the controller.
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Fixes: b17de076062a ("spi/bcm63xx: work around inability to keep CS up")
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Signed-off-by: Hang Zhou <929513338@qq.com>
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Link: https://patch.msgid.link/tencent_7AC88FCB3076489A4A7E6C2163DF1ACF8D06@qq.com
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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drivers/spi/spi-bcm63xx.c | 14 ++++++++++++++
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1 file changed, 14 insertions(+)
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--- a/drivers/spi/spi-bcm63xx.c
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+++ b/drivers/spi/spi-bcm63xx.c
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@@ -247,6 +247,20 @@ static int bcm63xx_txrx_bufs(struct spi_
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if (t->rx_buf) {
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do_rx = true;
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+
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+ /*
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+ * In certain hardware implementations, there appears to be a
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+ * hidden accumulator that tracks the number of bytes written into
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+ * the hardware FIFO, and this accumulator overrides the length in
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+ * the SPI_MSG_CTL register.
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+ *
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+ * Therefore, for read-only transfers, we need to write some dummy
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+ * value into the FIFO to keep the accumulator tracking the correct
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+ * length.
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+ */
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+ if (!t->tx_buf)
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+ memset_io(bs->tx_io + len, 0xFF, t->len);
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+
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/* prepend is half-duplex write only */
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if (t == first)
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prepend_len = 0;
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