Sander Vanheule d6165ea75b realtek: fix egress L2 learning on rtl839x ... The flag to enable L2 address learning on egress frames is in CPU header bit 40, with bit 0 being the leftmost bit of the header. This corresponds to BIT(7) in the third 16-bit value of the header. Correctly set L2LEARNING by fixing the off-by-one error. Fixes: 9eab76c84e ("realtek: Improve TX CPU-Tag usage") Tested-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Signed-off-by: Sander Vanheule <sander@svanheule.net>		2022-07-17 10:06:40 +02:00
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dsa/rtl83xx	realtek: cleanup LAG logging	2022-06-26 11:02:15 +02:00
ethernet	realtek: fix egress L2 learning on rtl839x	2022-07-17 10:06:40 +02:00
phy	realtek: rtl83xx-phy: abstract and document PHY features	2022-02-17 15:37:03 +00:00