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02629d8f87
Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
228 lines
5.6 KiB
Diff
228 lines
5.6 KiB
Diff
From 6a42dd698ddf91b6e9902b17e21dc13c6ae412ff Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Sun, 16 Mar 2014 05:24:42 +0000
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Subject: [PATCH 56/57] watchdog: add MT7621 support
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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drivers/watchdog/Kconfig | 7 ++
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drivers/watchdog/Makefile | 1 +
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drivers/watchdog/mt7621_wdt.c | 185 +++++++++++++++++++++++++++++++++++++++++
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3 files changed, 193 insertions(+)
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create mode 100644 drivers/watchdog/mt7621_wdt.c
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--- a/drivers/watchdog/Kconfig
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+++ b/drivers/watchdog/Kconfig
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@@ -1202,6 +1202,13 @@ config RALINK_WDT
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help
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Hardware driver for the Ralink SoC Watchdog Timer.
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+config MT7621_WDT
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+ tristate "Mediatek SoC watchdog"
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+ select WATCHDOG_CORE
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+ depends on SOC_MT7620 || SOC_MT7621
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+ help
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+ Hardware driver for the Ralink SoC Watchdog Timer.
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+
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# PARISC Architecture
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# POWERPC Architecture
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--- a/drivers/watchdog/Makefile
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+++ b/drivers/watchdog/Makefile
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@@ -139,6 +139,7 @@ obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
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octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
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obj-$(CONFIG_LANTIQ_WDT) += lantiq_wdt.o
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obj-$(CONFIG_RALINK_WDT) += rt2880_wdt.o
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+obj-$(CONFIG_MT7621_WDT) += mt7621_wdt.o
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# PARISC Architecture
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--- /dev/null
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+++ b/drivers/watchdog/mt7621_wdt.c
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@@ -0,0 +1,185 @@
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+/*
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+ * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
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+ *
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+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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+ * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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+ *
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+ * This driver was based on: drivers/watchdog/softdog.c
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/reset.h>
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+#include <linux/module.h>
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+#include <linux/kernel.h>
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+#include <linux/watchdog.h>
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+#include <linux/miscdevice.h>
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+#include <linux/moduleparam.h>
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+#include <linux/platform_device.h>
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+
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+#include <asm/mach-ralink/ralink_regs.h>
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+
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+#define SYSC_RSTSTAT 0x38
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+#define WDT_RST_CAUSE BIT(1)
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+
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+#define RALINK_WDT_TIMEOUT 30
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+
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+#define TIMER_REG_TMRSTAT 0x00
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+#define TIMER_REG_TMR1LOAD 0x24
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+#define TIMER_REG_TMR1CTL 0x20
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+
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+#define TMR1CTL_ENABLE BIT(7)
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+#define TMR1CTL_RESTART BIT(9)
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+
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+static void __iomem *mt762x_wdt_base;
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+
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+static bool nowayout = WATCHDOG_NOWAYOUT;
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+module_param(nowayout, bool, 0);
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+MODULE_PARM_DESC(nowayout,
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+ "Watchdog cannot be stopped once started (default="
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+ __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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+
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+static inline void rt_wdt_w32(unsigned reg, u32 val)
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+{
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+ iowrite32(val, mt762x_wdt_base + reg);
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+}
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+
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+static inline u32 rt_wdt_r32(unsigned reg)
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+{
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+ return ioread32(mt762x_wdt_base + reg);
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+}
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+
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+static int mt762x_wdt_ping(struct watchdog_device *w)
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+{
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+ rt_wdt_w32(TIMER_REG_TMRSTAT, TMR1CTL_RESTART);
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+
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+ return 0;
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+}
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+
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+static int mt762x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
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+{
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+ w->timeout = t;
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+ rt_wdt_w32(TIMER_REG_TMR1LOAD, t * 1000);
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+ mt762x_wdt_ping(w);
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+
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+ return 0;
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+}
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+
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+static int mt762x_wdt_start(struct watchdog_device *w)
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+{
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+ u32 t;
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+
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+ rt_wdt_w32(TIMER_REG_TMR1CTL, 1000 << 16);
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+ mt762x_wdt_set_timeout(w, w->timeout);
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+
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+ t = rt_wdt_r32(TIMER_REG_TMR1CTL);
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+ t |= TMR1CTL_ENABLE;
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+ rt_wdt_w32(TIMER_REG_TMR1CTL, t);
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+
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+ return 0;
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+}
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+
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+static int mt762x_wdt_stop(struct watchdog_device *w)
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+{
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+ u32 t;
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+
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+ mt762x_wdt_ping(w);
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+
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+ t = rt_wdt_r32(TIMER_REG_TMR1CTL);
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+ t &= ~TMR1CTL_ENABLE;
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+ rt_wdt_w32(TIMER_REG_TMR1CTL, t);
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+
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+ return 0;
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+}
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+
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+static int mt762x_wdt_bootcause(void)
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+{
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+ if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
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+ return WDIOF_CARDRESET;
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+
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+ return 0;
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+}
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+
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+static struct watchdog_info mt762x_wdt_info = {
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+ .identity = "Mediatek Watchdog",
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+ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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+};
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+
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+static struct watchdog_ops mt762x_wdt_ops = {
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+ .owner = THIS_MODULE,
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+ .start = mt762x_wdt_start,
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+ .stop = mt762x_wdt_stop,
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+ .ping = mt762x_wdt_ping,
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+ .set_timeout = mt762x_wdt_set_timeout,
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+};
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+
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+static struct watchdog_device mt762x_wdt_dev = {
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+ .info = &mt762x_wdt_info,
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+ .ops = &mt762x_wdt_ops,
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+ .min_timeout = 1,
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+};
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+
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+static int mt762x_wdt_probe(struct platform_device *pdev)
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+{
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+ struct resource *res;
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+ int ret;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ mt762x_wdt_base = devm_request_and_ioremap(&pdev->dev, res);
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+ if (IS_ERR(mt762x_wdt_base))
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+ return PTR_ERR(mt762x_wdt_base);
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+
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+ device_reset(&pdev->dev);
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+
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+ mt762x_wdt_dev.dev = &pdev->dev;
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+ mt762x_wdt_dev.bootstatus = mt762x_wdt_bootcause();
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+ mt762x_wdt_dev.max_timeout = (0xfffful / 1000);
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+ mt762x_wdt_dev.timeout = mt762x_wdt_dev.max_timeout;
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+
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+ watchdog_set_nowayout(&mt762x_wdt_dev, nowayout);
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+
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+ ret = watchdog_register_device(&mt762x_wdt_dev);
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+ if (!ret)
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+ dev_info(&pdev->dev, "Initialized\n");
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+
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+ return 0;
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+}
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+
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+static int mt762x_wdt_remove(struct platform_device *pdev)
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+{
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+ watchdog_unregister_device(&mt762x_wdt_dev);
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+
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+ return 0;
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+}
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+
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+static void mt762x_wdt_shutdown(struct platform_device *pdev)
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+{
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+ mt762x_wdt_stop(&mt762x_wdt_dev);
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+}
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+
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+static const struct of_device_id mt762x_wdt_match[] = {
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+ { .compatible = "mtk,mt7621-wdt" },
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+ {},
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+};
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+MODULE_DEVICE_TABLE(of, mt762x_wdt_match);
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+
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+static struct platform_driver mt762x_wdt_driver = {
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+ .probe = mt762x_wdt_probe,
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+ .remove = mt762x_wdt_remove,
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+ .shutdown = mt762x_wdt_shutdown,
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+ .driver = {
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+ .name = KBUILD_MODNAME,
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+ .owner = THIS_MODULE,
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+ .of_match_table = mt762x_wdt_match,
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+ },
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+};
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+
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+module_platform_driver(mt762x_wdt_driver);
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+
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+MODULE_DESCRIPTION("MediaTek MT762x hardware watchdog driver");
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+MODULE_AUTHOR("John Crispin <blogic@openwrt.org");
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+MODULE_LICENSE("GPL v2");
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+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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