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cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
75 lines
2.1 KiB
Diff
75 lines
2.1 KiB
Diff
From a1b049babfd0ae224179dc82ec69cb9bbf585699 Mon Sep 17 00:00:00 2001
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From: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
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Date: Sun, 16 Dec 2018 22:35:44 +0200
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Subject: [PATCH] net/phy: Inphi IN112525_s03 retimer updates
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The retimer doesn't get probed in linux due to the fact that it's a
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non-standard clause-45 device. Hardcoding the phyid in device-tree
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and adding custom routines for registry read/write operations
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solves the issue.
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Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
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---
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drivers/net/phy/inphi.c | 30 +++++++++++++++++++++++-------
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1 file changed, 23 insertions(+), 7 deletions(-)
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--- a/drivers/net/phy/inphi.c
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+++ b/drivers/net/phy/inphi.c
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@@ -82,11 +82,7 @@
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#define PHYMISC_REG22 0x01C0
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#define RX_VCO_CODE_OFFSET 5
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-
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-#define mdio_wr(a, b) phy_write_mmd(inphi_phydev, MDIO_MMD_VEND1, (a), (b))
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-#define mdio_rd(a) phy_read_mmd(inphi_phydev, MDIO_MMD_VEND1, (a))
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-
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-#define VCO_CODE 390
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+#define VCO_CODE 390
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int vco_codes[ALL_LANES] = {
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VCO_CODE,
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@@ -102,6 +98,23 @@ static DECLARE_DELAYED_WORK(mykmod_work,
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static unsigned long onesec;
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struct phy_device *inphi_phydev;
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+static int mdio_wr(u32 regnum, u16 val)
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+{
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+ regnum = MII_ADDR_C45 | (MDIO_MMD_VEND1 << 16) | (regnum & 0xffff);
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+
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+ return mdiobus_write(inphi_phydev->mdio.bus, inphi_phydev->mdio.addr,
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+ regnum, val);
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+}
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+
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+static int mdio_rd(u32 regnum)
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+{
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+ regnum = MII_ADDR_C45 | (MDIO_MMD_VEND1 << 16) | (regnum & 0xffff);
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+
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+ return mdiobus_read(inphi_phydev->mdio.bus, inphi_phydev->mdio.addr,
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+ regnum);
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+}
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+
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+
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int bit_test(int value, int bit_field)
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{
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int result;
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@@ -518,14 +531,17 @@ int inphi_probe(struct phy_device *phyde
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{
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int phy_id = 0, id_lsb = 0, id_msb = 0;
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+ /* setup the inphi_phydev ptr for mdio_rd/mdio_wr APIs */
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+ inphi_phydev = phydev;
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+
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/* Read device id from phy registers */
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- id_lsb = phy_read_mmd(phydev, MDIO_MMD_VEND1, INPHI_S03_DEVICE_ID_MSB);
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+ id_lsb = mdio_rd(INPHI_S03_DEVICE_ID_MSB);
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if (id_lsb < 0)
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return -ENXIO;
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phy_id = id_lsb << 16;
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- id_msb = phy_read_mmd(phydev, MDIO_MMD_VEND1, INPHI_S03_DEVICE_ID_LSB);
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+ id_msb = mdio_rd(INPHI_S03_DEVICE_ID_LSB);
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if (id_msb < 0)
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return -ENXIO;
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