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0dcbe4e931
Copy config and patches from 5.15. This simplifies reviewing process. Signed-off-by: Nick Hainke <vincent@systemli.org>
61 lines
2.0 KiB
Diff
61 lines
2.0 KiB
Diff
From f383b0770612838e78986231710c0a3afee4db42 Mon Sep 17 00:00:00 2001
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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Date: Mon, 10 Jan 2022 12:49:27 +0100
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Subject: [PATCH 1/2] dt-bindings: reset: add dt binding header for Mediatek MT7621 resets
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add dt binding header for resets lines in Mediatek MT7621 SoCs.
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Acked-by: Rob Herring <robh@kernel.org>
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Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Link: https://lore.kernel.org/r/20220110114930.1406665-2-sergio.paracuellos@gmail.com
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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include/dt-bindings/reset/mt7621-reset.h | 37 ++++++++++++++++++++++++++++++++
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1 file changed, 37 insertions(+)
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create mode 100644 include/dt-bindings/reset/mt7621-reset.h
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--- /dev/null
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+++ b/include/dt-bindings/reset/mt7621-reset.h
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@@ -0,0 +1,37 @@
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+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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+/*
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+ * Copyright (c) 2021 Sergio Paracuellos
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+ * Author: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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+ */
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+
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+#ifndef DT_BINDING_MT7621_RESET_H
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+#define DT_BINDING_MT7621_RESET_H
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+
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+#define MT7621_RST_SYS 0
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+#define MT7621_RST_MCM 2
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+#define MT7621_RST_HSDMA 5
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+#define MT7621_RST_FE 6
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+#define MT7621_RST_SPDIFTX 7
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+#define MT7621_RST_TIMER 8
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+#define MT7621_RST_INT 9
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+#define MT7621_RST_MC 10
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+#define MT7621_RST_PCM 11
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+#define MT7621_RST_PIO 13
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+#define MT7621_RST_GDMA 14
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+#define MT7621_RST_NFI 15
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+#define MT7621_RST_I2C 16
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+#define MT7621_RST_I2S 17
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+#define MT7621_RST_SPI 18
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+#define MT7621_RST_UART1 19
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+#define MT7621_RST_UART2 20
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+#define MT7621_RST_UART3 21
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+#define MT7621_RST_ETH 23
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+#define MT7621_RST_PCIE0 24
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+#define MT7621_RST_PCIE1 25
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+#define MT7621_RST_PCIE2 26
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+#define MT7621_RST_AUX_STCK 28
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+#define MT7621_RST_CRYPTO 29
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+#define MT7621_RST_SDXC 30
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+#define MT7621_RST_PPE 31
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+
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+#endif /* DT_BINDING_MT7621_RESET_H */
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