mirror of
				git://git.openwrt.org/openwrt/openwrt.git
				synced 2025-10-31 05:54:26 -04:00 
			
		
		
		
	
		
			
				
	
	
		
			628 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			628 lines
		
	
	
		
			17 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 40563ab5aa698191dbd8a05fe6053aa790eee2a1 Mon Sep 17 00:00:00 2001
 | |
| From: Alison Wang <b18965@freescale.com>
 | |
| Date: Thu, 4 Aug 2011 09:59:46 +0800
 | |
| Subject: [PATCH 26/52] Add RTC driver support for MCF5445x
 | |
| 
 | |
| On-chip RTC module support for MCF54451 and MCF54455.
 | |
| Using internal 32K clock to drive the rtc module.
 | |
| 
 | |
| Signed-off-by: Alison Wang <b18965@freescale.com>
 | |
| ---
 | |
|  drivers/rtc/Kconfig   |    9 +
 | |
|  drivers/rtc/Makefile  |    1 +
 | |
|  drivers/rtc/rtc-mcf.c |  583 +++++++++++++++++++++++++++++++++++++++++++++++++
 | |
|  3 files changed, 593 insertions(+), 0 deletions(-)
 | |
|  create mode 100644 drivers/rtc/rtc-mcf.c
 | |
| 
 | |
| --- a/drivers/rtc/Kconfig
 | |
| +++ b/drivers/rtc/Kconfig
 | |
| @@ -919,6 +919,15 @@ config RTC_DRV_MV
 | |
|  	  This driver can also be built as a module. If so, the module
 | |
|  	  will be called rtc-mv.
 | |
|  
 | |
| +config RTC_MCF
 | |
| +        tristate "Freescale Coldfire Real Time Clock"
 | |
| +        depends on COLDFIRE
 | |
| +        help
 | |
| +          If you say yes here you will get support for the on-chip Coldfire
 | |
| +	  Real-Time Clock.
 | |
| +
 | |
| +	  If you build it as a module it will be call mcf-rtc.
 | |
| +
 | |
|  config RTC_DRV_PS3
 | |
|  	tristate "PS3 RTC"
 | |
|  	depends on PPC_PS3
 | |
| --- a/drivers/rtc/Makefile
 | |
| +++ b/drivers/rtc/Makefile
 | |
| @@ -102,3 +102,4 @@ obj-$(CONFIG_RTC_DRV_VR41XX)	+= rtc-vr41
 | |
|  obj-$(CONFIG_RTC_DRV_WM831X)	+= rtc-wm831x.o
 | |
|  obj-$(CONFIG_RTC_DRV_WM8350)	+= rtc-wm8350.o
 | |
|  obj-$(CONFIG_RTC_DRV_X1205)	+= rtc-x1205.o
 | |
| +obj-$(CONFIG_RTC_MCF)           += rtc-mcf.o
 | |
| --- /dev/null
 | |
| +++ b/drivers/rtc/rtc-mcf.c
 | |
| @@ -0,0 +1,583 @@
 | |
| +/*
 | |
| + * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
 | |
| + *
 | |
| + * Implementation based on rtc-mxc.c
 | |
| + * This file contains Real Time Clock interface for Linux.
 | |
| + *
 | |
| + * This is free software; you can redistribute it and/or modify
 | |
| + * it under the terms of the GNU General Public License as published by
 | |
| + * the Free Software Foundation; either version 2 of the License, or
 | |
| + * (at your option) any later version.
 | |
| + */
 | |
| +
 | |
| +#include <linux/rtc.h>
 | |
| +#include <linux/module.h>
 | |
| +#include <linux/fs.h>
 | |
| +#include <linux/init.h>
 | |
| +#include <linux/interrupt.h>
 | |
| +#include <linux/platform_device.h>
 | |
| +#include <linux/clk.h>
 | |
| +#include <linux/uaccess.h>
 | |
| +#include <asm/mcfsim.h>
 | |
| +#include <linux/slab.h>
 | |
| +#include <linux/io.h>
 | |
| +
 | |
| +#ifdef readl
 | |
| +#undef readl
 | |
| +#endif
 | |
| +
 | |
| +#ifdef writel
 | |
| +#undef writel
 | |
| +#endif
 | |
| +
 | |
| +#define readl(addr)      in_be32(addr)
 | |
| +#define writel(val, addr) out_be32((addr), (val))
 | |
| +
 | |
| +#define RTC_INPUT_CLK_32768HZ	0x8000
 | |
| +#define RTC_INPUT_CLK_32000HZ	0x7D00
 | |
| +#define RTC_INPUT_CLK_38400HZ	0x9600
 | |
| +#define RTC_INPUT_CLK_48000HZ	0xBB80
 | |
| +
 | |
| +#define PIT_ALL_ON (MCF_RTC_ISR_2HZ | MCF_RTC_ISR_SAM0 | MCF_RTC_ISR_SAM1 | \
 | |
| +		     MCF_RTC_ISR_SAM2 | MCF_RTC_ISR_SAM3 | MCF_RTC_ISR_SAM4 | \
 | |
| +		     MCF_RTC_ISR_SAM5 | MCF_RTC_ISR_SAM6 | MCF_RTC_ISR_SAM7)
 | |
| +
 | |
| +#define MAX_PIE_NUM     9
 | |
| +#define MAX_PIE_FREQ    512
 | |
| +const u32 PIE_BIT_DEF[MAX_PIE_NUM][2] = {
 | |
| +	{2,   MCF_RTC_ISR_2HZ},
 | |
| +	{4,   MCF_RTC_ISR_SAM0},
 | |
| +	{8,   MCF_RTC_ISR_SAM1},
 | |
| +	{16,  MCF_RTC_ISR_SAM2},
 | |
| +	{32,  MCF_RTC_ISR_SAM3},
 | |
| +	{64,  MCF_RTC_ISR_SAM4},
 | |
| +	{128, MCF_RTC_ISR_SAM5},
 | |
| +	{256, MCF_RTC_ISR_SAM6},
 | |
| +	{MAX_PIE_FREQ, MCF_RTC_ISR_SAM7},
 | |
| +};
 | |
| +
 | |
| +/* Those are the bits from a classic RTC we want to mimic */
 | |
| +#define RTC_IRQF                0x80	/* any of the following 3 is active */
 | |
| +#define RTC_PF                  0x40	/* Periodic interrupt */
 | |
| +#define RTC_AF                  0x20	/* Alarm interrupt */
 | |
| +#define RTC_UF                  0x10	/* Update interrupt for 1Hz RTC */
 | |
| +
 | |
| +#define MCF_RTC_TIME            0
 | |
| +#define MCF_RTC_ALARM           1
 | |
| +
 | |
| +struct rtc_plat_data {
 | |
| +	struct rtc_device *rtc;
 | |
| +	int irq;
 | |
| +	unsigned int irqen;
 | |
| +	int alrm_sec;
 | |
| +	int alrm_min;
 | |
| +	int alrm_hour;
 | |
| +	int alrm_mday;
 | |
| +};
 | |
| +
 | |
| +/*!
 | |
| + * @defgroup RTC Real Time Clock (RTC) Driver
 | |
| + */
 | |
| +/*!
 | |
| + * @file rtc-mcf.c
 | |
| + * @brief Real Time Clock interface
 | |
| + *
 | |
| + * This file contains Real Time Clock interface for Linux.
 | |
| + *
 | |
| + * @ingroup RTC
 | |
| + */
 | |
| +
 | |
| +#define RTC_VERSION		"0.1"
 | |
| +
 | |
| +static u32 rtc_freq = 2;	/* minimun value for PIE */
 | |
| +static unsigned long rtc_status;
 | |
| +
 | |
| +static struct rtc_time g_rtc_alarm = {
 | |
| +	.tm_year = 0,
 | |
| +	.tm_mon = 0,
 | |
| +	.tm_mday = 0,
 | |
| +	.tm_hour = 0,
 | |
| +	.tm_mon = 0,
 | |
| +	.tm_sec = 0,
 | |
| +};
 | |
| +
 | |
| +static DEFINE_SPINLOCK(rtc_lock);
 | |
| +
 | |
| +/*!
 | |
| + * This function is used to obtain the RTC time or the alarm value in
 | |
| + * second.
 | |
| + *
 | |
| + * @param  time_alarm   use MCF_RTC_TIME for RTC time value;
 | |
| + *			    MCF_RTC_ALARM for alarm value
 | |
| + *
 | |
| + * @return The RTC time or alarm time in second.
 | |
| + */
 | |
| +static u32 get_alarm_or_time(struct device *dev, int time_alarm)
 | |
| +{
 | |
| +	u32 day, hr, min, sec, hr_min;
 | |
| +
 | |
| +	if (time_alarm == MCF_RTC_TIME) {
 | |
| +		day = MCF_RTC_DAYS_DAYS(readl(MCF_RTC_DAYS));
 | |
| +		hr_min = readl(MCF_RTC_HOURMIN);
 | |
| +		sec = MCF_RTC_SECONDS_SECONDS(readl(MCF_RTC_SECONDS));
 | |
| +	} else if (time_alarm == MCF_RTC_ALARM) {
 | |
| +		day = MCF_RTC_ALRM_DAY_DAYS(readl(MCF_RTC_ALRM_DAY));
 | |
| +		hr_min = readl(MCF_RTC_ALRM_HM);
 | |
| +		sec = MCF_RTC_ALRM_SEC_SECONDS(readl(MCF_RTC_ALRM_SEC));
 | |
| +	} else {
 | |
| +		panic("wrong value for time_alarm=%d\n", time_alarm);
 | |
| +	}
 | |
| +
 | |
| +	hr = (hr_min >> 8) & 0x001F;
 | |
| +	min = hr_min & 0x003F;
 | |
| +
 | |
| +	return (((day * 24 + hr) * 60) + min) * 60 + sec;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function sets the RTC alarm value or the time value.
 | |
| + *
 | |
| + * @param  time_alarm	the new alarm value to be updated in the RTC
 | |
| + * @param  time	use MCF_RTC_TIME for RTC time value;
 | |
| + *			MCF_RTC_ALARM for alarm value
 | |
| + */
 | |
| +static void set_alarm_or_time(struct device *dev, int time_alarm, u32 time)
 | |
| +{
 | |
| +	u32 day, hr, min, sec, temp;
 | |
| +
 | |
| +	day = time / 86400;
 | |
| +	time -= day * 86400;
 | |
| +	/* time is within a day now */
 | |
| +	hr = time / 3600;
 | |
| +	time -= hr * 3600;
 | |
| +	/* time is within an hour now */
 | |
| +	min = time / 60;
 | |
| +	sec = time - min * 60;
 | |
| +
 | |
| +	temp = (hr << 8) + min;
 | |
| +
 | |
| +	if (time_alarm == MCF_RTC_TIME) {
 | |
| +		writel(day, MCF_RTC_DAYS);
 | |
| +		writel(sec, MCF_RTC_SECONDS);
 | |
| +		writel(temp, MCF_RTC_HOURMIN);
 | |
| +	} else if (time_alarm == MCF_RTC_ALARM) {
 | |
| +		writel(day, MCF_RTC_ALRM_DAY);
 | |
| +		writel(sec, MCF_RTC_ALRM_SEC);
 | |
| +		writel(temp, MCF_RTC_ALRM_HM);
 | |
| +	} else {
 | |
| +		panic("wrong value for time_alarm=%d\n", time_alarm);
 | |
| +	}
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function updates the RTC alarm registers and then clears all the
 | |
| + * interrupt status bits.
 | |
| + *
 | |
| + * @param  alrm         the new alarm value to be updated in the RTC
 | |
| + *
 | |
| + * @return  0 if successful; non-zero otherwise.
 | |
| + */
 | |
| +static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm)
 | |
| +{
 | |
| +	struct rtc_time alarm_tm, now_tm;
 | |
| +	unsigned long now, time;
 | |
| +	int ret;
 | |
| +
 | |
| +	now = get_alarm_or_time(dev, MCF_RTC_TIME);
 | |
| +	rtc_time_to_tm(now, &now_tm);
 | |
| +	alarm_tm.tm_year = now_tm.tm_year;
 | |
| +	alarm_tm.tm_mon = now_tm.tm_mon;
 | |
| +	alarm_tm.tm_mday = now_tm.tm_mday;
 | |
| +	alarm_tm.tm_hour = alrm->tm_hour;
 | |
| +	alarm_tm.tm_min = alrm->tm_min;
 | |
| +	alarm_tm.tm_sec = alrm->tm_sec;
 | |
| +	rtc_tm_to_time(&now_tm, &now);
 | |
| +	rtc_tm_to_time(&alarm_tm, &time);
 | |
| +	if (time < now) {
 | |
| +		time += 60 * 60 * 24;
 | |
| +		rtc_time_to_tm(time, &alarm_tm);
 | |
| +	}
 | |
| +	ret = rtc_tm_to_time(&alarm_tm, &time);
 | |
| +
 | |
| +	/* clear all the interrupt status bits */
 | |
| +	writel(readl(MCF_RTC_ISR), MCF_RTC_ISR);
 | |
| +
 | |
| +	set_alarm_or_time(dev, MCF_RTC_ALARM, time);
 | |
| +
 | |
| +	return ret;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function is the RTC interrupt service routine.
 | |
| + *
 | |
| + * @param  irq          RTC IRQ number
 | |
| + * @param  dev_id       device ID which is not used
 | |
| + *
 | |
| + * @return IRQ_HANDLED as defined in the include/linux/interrupt.h file.
 | |
| + */
 | |
| +static irqreturn_t mcf_rtc_interrupt(int irq, void *dev_id)
 | |
| +{
 | |
| +	struct platform_device *pdev = dev_id;
 | |
| +	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 | |
| +	u32 status, events = 0;
 | |
| +
 | |
| +	spin_lock(&rtc_lock);
 | |
| +
 | |
| +	/* clear interrupt sources */
 | |
| +	status = readl(MCF_RTC_ISR) & readl(MCF_RTC_IER);
 | |
| +	writel(status, MCF_RTC_ISR);
 | |
| +
 | |
| +	/* clear alarm interrupt if it has occurred */
 | |
| +	if (status & MCF_RTC_ISR_ALM)
 | |
| +		status &= ~MCF_RTC_ISR_ALM;
 | |
| +
 | |
| +	/* update irq data & counter */
 | |
| +	if (status & MCF_RTC_ISR_ALM)
 | |
| +		events |= (RTC_AF | RTC_IRQF);
 | |
| +	if (status & MCF_RTC_ISR_1HZ)
 | |
| +		events |= (RTC_UF | RTC_IRQF);
 | |
| +	if (status & PIT_ALL_ON)
 | |
| +		events |= (RTC_PF | RTC_IRQF);
 | |
| +
 | |
| +	if ((status & MCF_RTC_ISR_ALM) && rtc_valid_tm(&g_rtc_alarm))
 | |
| +		rtc_update_alarm(&pdev->dev, &g_rtc_alarm);
 | |
| +
 | |
| +	spin_unlock(&rtc_lock);
 | |
| +	rtc_update_irq(pdata->rtc, 1, events);
 | |
| +	return IRQ_HANDLED;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * clear all interrupts and release the IRQ
 | |
| + */
 | |
| +static void mcf_rtc_release(struct device *dev)
 | |
| +{
 | |
| +	spin_lock_irq(&rtc_lock);
 | |
| +	writel(0, MCF_RTC_IER);			/* Disable all rtc interrupts */
 | |
| +	writel(0x0000FFBF, MCF_RTC_ISR);	/* Clear all interrupt status */
 | |
| +	spin_unlock_irq(&rtc_lock);
 | |
| +	rtc_status = 0;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function is used to support some ioctl calls directly.
 | |
| + * Other ioctl calls are supported indirectly through the
 | |
| + * arm/common/rtctime.c file.
 | |
| + *
 | |
| + * @param  cmd          ioctl command as defined in include/linux/rtc.h
 | |
| + * @param  arg          value for the ioctl command
 | |
| + *
 | |
| + * @return  0 if successful or negative value otherwise.
 | |
| + */
 | |
| +static int mcf_rtc_ioctl(struct device *dev, unsigned int cmd,
 | |
| +			 unsigned long arg)
 | |
| +{
 | |
| +	int i;
 | |
| +
 | |
| +	switch (cmd) {
 | |
| +	case RTC_PIE_OFF:
 | |
| +		writel((readl(MCF_RTC_IER) & ~PIT_ALL_ON), MCF_RTC_IER);
 | |
| +		return 0;
 | |
| +	case RTC_IRQP_SET:
 | |
| +		if (arg < 2 || arg > MAX_PIE_FREQ || (arg % 2) != 0)
 | |
| +			return -EINVAL;	/* Also make sure a power of 2Hz */
 | |
| +		if ((arg > 64) && (!capable(CAP_SYS_RESOURCE)))
 | |
| +			return -EACCES;
 | |
| +		rtc_freq = arg;
 | |
| +		return 0;
 | |
| +	case RTC_IRQP_READ:
 | |
| +		return put_user(rtc_freq, (u32 *) arg);
 | |
| +	case RTC_PIE_ON:
 | |
| +		for (i = 0; i < MAX_PIE_NUM; i++) {
 | |
| +			if (PIE_BIT_DEF[i][0] == rtc_freq)
 | |
| +				break;
 | |
| +		}
 | |
| +		if (i == MAX_PIE_NUM)
 | |
| +			return -EACCES;
 | |
| +		spin_lock_irq(&rtc_lock);
 | |
| +		writel((readl(MCF_RTC_IER) | PIE_BIT_DEF[i][1]), MCF_RTC_IER);
 | |
| +		spin_unlock_irq(&rtc_lock);
 | |
| +		return 0;
 | |
| +	case RTC_AIE_OFF:
 | |
| +		spin_lock_irq(&rtc_lock);
 | |
| +		writel((readl(MCF_RTC_IER) & ~MCF_RTC_ISR_ALM), MCF_RTC_IER);
 | |
| +		spin_unlock_irq(&rtc_lock);
 | |
| +		return 0;
 | |
| +
 | |
| +	case RTC_AIE_ON:
 | |
| +		spin_lock_irq(&rtc_lock);
 | |
| +		writel((readl(MCF_RTC_IER) | MCF_RTC_ISR_ALM), MCF_RTC_IER);
 | |
| +		spin_unlock_irq(&rtc_lock);
 | |
| +		return 0;
 | |
| +
 | |
| +	case RTC_UIE_OFF:	/* UIE is for the 1Hz interrupt */
 | |
| +		spin_lock_irq(&rtc_lock);
 | |
| +		writel((readl(MCF_RTC_IER) & ~MCF_RTC_ISR_1HZ), MCF_RTC_IER);
 | |
| +		spin_unlock_irq(&rtc_lock);
 | |
| +		return 0;
 | |
| +
 | |
| +	case RTC_UIE_ON:
 | |
| +		spin_lock_irq(&rtc_lock);
 | |
| +		writel((readl(MCF_RTC_IER) | MCF_RTC_ISR_1HZ), MCF_RTC_IER);
 | |
| +		spin_unlock_irq(&rtc_lock);
 | |
| +		return 0;
 | |
| +	}
 | |
| +	return -ENOIOCTLCMD;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function reads the current RTC time into tm in Gregorian date.
 | |
| + *
 | |
| + * @param  tm           contains the RTC time value upon return
 | |
| + *
 | |
| + * @return  0 if successful; non-zero otherwise.
 | |
| + */
 | |
| +static int mcf_rtc_read_time(struct device *dev, struct rtc_time *tm)
 | |
| +{
 | |
| +	u32 val;
 | |
| +
 | |
| +	/* Avoid roll-over from reading the different registers */
 | |
| +	do {
 | |
| +		val = get_alarm_or_time(dev, MCF_RTC_TIME);
 | |
| +	} while (val != get_alarm_or_time(dev, MCF_RTC_TIME));
 | |
| +
 | |
| +	rtc_time_to_tm(val, tm);
 | |
| +	return 0;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function sets the internal RTC time based on tm in Gregorian date.
 | |
| + *
 | |
| + * @param  tm           the time value to be set in the RTC
 | |
| + *
 | |
| + * @return  0 if successful; non-zero otherwise.
 | |
| + */
 | |
| +static int mcf_rtc_set_time(struct device *dev, struct rtc_time *tm)
 | |
| +{
 | |
| +	unsigned long time;
 | |
| +	int ret;
 | |
| +
 | |
| +	ret = rtc_tm_to_time(tm, &time);
 | |
| +	if (ret != 0)
 | |
| +		return ret;
 | |
| +
 | |
| +	/* Avoid roll-over from reading the different registers */
 | |
| +	do {
 | |
| +		set_alarm_or_time(dev, MCF_RTC_TIME, time);
 | |
| +	} while (time != get_alarm_or_time(dev, MCF_RTC_TIME));
 | |
| +
 | |
| +	return ret;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function reads the current alarm value into the passed in \b alrm
 | |
| + * argument. It updates the \b alrm's pending field value based on the whether
 | |
| + * an alarm interrupt occurs or not.
 | |
| + *
 | |
| + * @param  alrm         contains the RTC alarm value upon return
 | |
| + *
 | |
| + * @return  0 if successful; non-zero otherwise.
 | |
| + */
 | |
| +static int mcf_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 | |
| +{
 | |
| +	rtc_time_to_tm(get_alarm_or_time(dev, MCF_RTC_ALARM), &alrm->time);
 | |
| +	alrm->pending = ((readl(MCF_RTC_ISR) & MCF_RTC_ISR_ALM) != 0) ? 1 : 0;
 | |
| +
 | |
| +	return 0;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function sets the RTC alarm based on passed in alrm.
 | |
| + *
 | |
| + * @param  alrm         the alarm value to be set in the RTC
 | |
| + *
 | |
| + * @return  0 if successful; non-zero otherwise.
 | |
| + */
 | |
| +static int mcf_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
 | |
| +{
 | |
| +	int ret;
 | |
| +
 | |
| +	spin_lock_irq(&rtc_lock);
 | |
| +	if (rtc_valid_tm(&alrm->time)) {
 | |
| +		if (alrm->time.tm_sec > 59 ||
 | |
| +		    alrm->time.tm_hour > 23 || alrm->time.tm_min > 59) {
 | |
| +			ret = -EINVAL;
 | |
| +			goto out;
 | |
| +		}
 | |
| +		ret = rtc_update_alarm(dev, &alrm->time);
 | |
| +	} else {
 | |
| +		ret = rtc_valid_tm(&alrm->time);
 | |
| +		if (ret)
 | |
| +			goto out;
 | |
| +		ret = rtc_update_alarm(dev, &alrm->time);
 | |
| +	}
 | |
| +
 | |
| +	if (ret == 0) {
 | |
| +		memcpy(&g_rtc_alarm, &alrm->time, sizeof(struct rtc_time));
 | |
| +
 | |
| +		if (alrm->enabled) {
 | |
| +			writel((readl(MCF_RTC_IER) | MCF_RTC_ISR_ALM),
 | |
| +				MCF_RTC_IER);
 | |
| +		} else {
 | |
| +			writel((readl(MCF_RTC_IER) & ~MCF_RTC_ISR_ALM),
 | |
| +				MCF_RTC_IER);
 | |
| +		}
 | |
| +	}
 | |
| +out:
 | |
| +	spin_unlock_irq(&rtc_lock);
 | |
| +
 | |
| +	return ret;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function is used to provide the content for the /proc/driver/rtc
 | |
| + * file.
 | |
| + *
 | |
| + * @param  buf		the buffer to hold the information that the driver
 | |
| + *			wants to write
 | |
| + *
 | |
| + * @return  The number of bytes written into the rtc file.
 | |
| + */
 | |
| +static int mcf_rtc_proc(struct device *dev, struct seq_file *sq)
 | |
| +{
 | |
| +	char *p = sq->buf;
 | |
| +
 | |
| +	p += sprintf(p, "alarm_IRQ\t: %s\n",
 | |
| +		     (((readl(MCF_RTC_IER)) & MCF_RTC_ISR_ALM) !=
 | |
| +		      0) ? "yes" : "no");
 | |
| +	p += sprintf(p, "update_IRQ\t: %s\n",
 | |
| +		     (((readl(MCF_RTC_IER)) & MCF_RTC_ISR_1HZ) !=
 | |
| +		      0) ? "yes" : "no");
 | |
| +	p += sprintf(p, "periodic_IRQ\t: %s\n",
 | |
| +		     (((readl(MCF_RTC_IER)) & PIT_ALL_ON) !=
 | |
| +		      0) ? "yes" : "no");
 | |
| +	p += sprintf(p, "periodic_freq\t: %d\n", rtc_freq);
 | |
| +
 | |
| +	return p - (sq->buf);
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * The RTC driver structure
 | |
| + */
 | |
| +static struct rtc_class_ops mcf_rtc_ops = {
 | |
| +	.ioctl = mcf_rtc_ioctl,
 | |
| +	.read_time = mcf_rtc_read_time,
 | |
| +	.set_time = mcf_rtc_set_time,
 | |
| +	.read_alarm = mcf_rtc_read_alarm,
 | |
| +	.set_alarm = mcf_rtc_set_alarm,
 | |
| +	.proc = mcf_rtc_proc,
 | |
| +};
 | |
| +
 | |
| +static int __devinit mcf_rtc_probe(struct platform_device *pdev)
 | |
| +{
 | |
| +	struct timespec tv;
 | |
| +	struct rtc_device *rtc;
 | |
| +	struct rtc_plat_data *pdata = NULL;
 | |
| +	u32 ret = 0;
 | |
| +
 | |
| +	pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 | |
| +	if (!pdata)
 | |
| +		return -ENOMEM;
 | |
| +	/* External clock is hard wired to 32768Hz.
 | |
| +	 * Clock settings 32K, 38.4K and 48K are defined above. */
 | |
| +#if defined(CONFIG_M5227x) | defined(CONFIG_M5445X)
 | |
| +	writel(0, MCF_RTC_GOCU);
 | |
| +	writel(RTC_INPUT_CLK_32768HZ, MCF_RTC_GOCL);
 | |
| +#endif
 | |
| +	/* Configure and enable the RTC */
 | |
| +	pdata->irq = MCFINT_VECBASE + MCFINT_RTC;
 | |
| +	if (request_irq(pdata->irq, mcf_rtc_interrupt, IRQF_DISABLED,
 | |
| +			pdev->name, pdev) < 0) {
 | |
| +		dev_warn(&pdev->dev, "interrupt not available.\n");
 | |
| +		pdata->irq = -1;
 | |
| +	}
 | |
| +
 | |
| +	if (test_and_set_bit(1, &rtc_status))
 | |
| +		return -EBUSY;
 | |
| +
 | |
| +	rtc = rtc_device_register(pdev->name, &pdev->dev, &mcf_rtc_ops,
 | |
| +				THIS_MODULE);
 | |
| +	if (IS_ERR(rtc)) {
 | |
| +		ret = PTR_ERR(rtc);
 | |
| +		if (pdata->irq >= 0)
 | |
| +			free_irq(pdata->irq, pdev);
 | |
| +		kfree(pdata);
 | |
| +		return ret;
 | |
| +	}
 | |
| +	pdata->rtc = rtc;
 | |
| +	platform_set_drvdata(pdev, pdata);
 | |
| +
 | |
| +	tv.tv_nsec = 0;
 | |
| +	tv.tv_sec = get_alarm_or_time(&pdev->dev, MCF_RTC_TIME);
 | |
| +
 | |
| +#ifdef CONFIG_M5301x
 | |
| +	writel(RTC_INPUT_CLK_32768HZ, MCF_RTC_GOC);
 | |
| +	writel(0x08, MCF_RTC_OCEN);
 | |
| +#endif
 | |
| +	writeb(4, MCFSIM_ICR_RTC);
 | |
| +
 | |
| +	writel(MCF_RTC_IER_1HZ, MCF_RTC_IER);  /* Unmask the 1Hz timer */
 | |
| +
 | |
| +	writel(MCF_RTC_CR_EN, MCF_RTC_CR);
 | |
| +	if ((readl(MCF_RTC_CR) & MCF_RTC_CR_EN) == 0) {
 | |
| +		printk(KERN_ALERT "RTC Hardware couldn't be enabled!\n");
 | |
| +		return -EPERM;
 | |
| +	}
 | |
| +
 | |
| +	printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION);
 | |
| +	return ret;
 | |
| +}
 | |
| +
 | |
| +static int __devexit mcf_rtc_remove(struct platform_device *pdev)
 | |
| +{
 | |
| +	struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
 | |
| +
 | |
| +	rtc_device_unregister(pdata->rtc);
 | |
| +	if (pdata->irq >= 0)
 | |
| +		free_irq(pdata->irq, pdev);
 | |
| +	kfree(pdata);
 | |
| +	mcf_rtc_release(NULL);
 | |
| +	return 0;
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * Contains pointers to the power management callback functions.
 | |
| + */
 | |
| +MODULE_ALIAS("mcf-rtc");
 | |
| +static struct platform_driver mcf_rtc_driver = {
 | |
| +	.driver	= {
 | |
| +		   .name = "mcf-rtc",
 | |
| +		   .owner = THIS_MODULE,
 | |
| +		   },
 | |
| +	.probe	= mcf_rtc_probe,
 | |
| +	.remove	= __devexit_p(mcf_rtc_remove),
 | |
| +};
 | |
| +
 | |
| +/*!
 | |
| + * This function creates the /proc/driver/rtc file and registers the device RTC
 | |
| + * in the /dev/misc directory. It also reads the RTC value from external source
 | |
| + * and setup the internal RTC properly.
 | |
| + *
 | |
| + * @return  -1 if RTC is failed to initialize; 0 is successful.
 | |
| + */
 | |
| +static int __init mcf_rtc_init(void)
 | |
| +{
 | |
| +	return platform_driver_register(&mcf_rtc_driver);
 | |
| +}
 | |
| +
 | |
| +/*!
 | |
| + * This function removes the /proc/driver/rtc file and un-registers the
 | |
| + * device RTC from the /dev/misc directory.
 | |
| + */
 | |
| +static void __exit mcf_rtc_exit(void)
 | |
| +{
 | |
| +	platform_driver_unregister(&mcf_rtc_driver);
 | |
| +
 | |
| +}
 | |
| +
 | |
| +module_init(mcf_rtc_init);
 | |
| +module_exit(mcf_rtc_exit);
 | |
| +
 | |
| +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 | |
| +MODULE_DESCRIPTION("Real Time Clock Driver (MCF)");
 | |
| +MODULE_LICENSE("GPL");
 |