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77e97abf12
Also removes random module and switches to new bcm2711 thermal driver. Boot tested on RPi 4B v1.1 4G. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
67 lines
1.9 KiB
Diff
67 lines
1.9 KiB
Diff
From 3cf4a365b833d7a2e7622ad5569b9d54aebbe593 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 19 Dec 2019 16:25:26 +0100
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Subject: [PATCH] drm/vc4: hdmi: Add reset callback
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The BCM2711 and BCM283x HDMI controllers use a slightly different reset
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sequence, so let's add a callback to reset the controller.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 17 ++++++++++++-----
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drivers/gpu/drm/vc4/vc4_hdmi.h | 3 +++
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2 files changed, 15 insertions(+), 5 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -68,6 +68,15 @@ static int vc4_hdmi_debugfs_regs(struct
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return 0;
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}
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+static void vc4_hdmi_reset(struct vc4_hdmi *vc4_hdmi)
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+{
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+ HDMI_WRITE(HDMI_SW_RESET_CONTROL,
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+ VC4_HDMI_SW_RESET_HDMI |
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+ VC4_HDMI_SW_RESET_FORMAT_DETECT);
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+
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+ HDMI_WRITE(HDMI_SW_RESET_CONTROL, 0);
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+}
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+
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static enum drm_connector_status
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vc4_hdmi_connector_detect(struct drm_connector *connector, bool force)
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{
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@@ -372,11 +381,8 @@ static void vc4_hdmi_encoder_enable(stru
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return;
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}
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- HDMI_WRITE(HDMI_SW_RESET_CONTROL,
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- VC4_HDMI_SW_RESET_HDMI |
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- VC4_HDMI_SW_RESET_FORMAT_DETECT);
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-
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- HDMI_WRITE(HDMI_SW_RESET_CONTROL, 0);
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+ if (vc4_hdmi->variant->reset)
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+ vc4_hdmi->variant->reset(vc4_hdmi);
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/* PHY should be in reset, like
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* vc4_hdmi_encoder_disable() does.
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@@ -1421,6 +1427,7 @@ static const struct vc4_hdmi_variant bcm
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.num_registers = ARRAY_SIZE(vc4_hdmi_fields),
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.init_resources = vc4_hdmi_init_resources,
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+ .reset = vc4_hdmi_reset,
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};
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static const struct of_device_id vc4_hdmi_dt_match[] = {
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
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@@ -35,6 +35,9 @@ struct vc4_hdmi_variant {
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* clocks, etc) for that variant.
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*/
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int (*init_resources)(struct vc4_hdmi *vc4_hdmi);
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+
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+ /* Callback to reset the HDMI block */
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+ void (*reset)(struct vc4_hdmi *vc4_hdmi);
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};
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/* HDMI audio information */
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