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			560 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			560 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * ramips_spi.c -- Ralink RT288x/RT305x SPI controller driver
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|  *
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|  * Copyright (C) 2011 Sergiy <piratfm@gmail.com>
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|  * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
 | |
| 
 | |
| #include <linux/init.h>
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| #include <linux/module.h>
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| #include <linux/clk.h>
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| #include <linux/err.h>
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| #include <linux/delay.h>
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| #include <linux/platform_device.h>
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| #include <linux/io.h>
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| #include <linux/spi/spi.h>
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| 
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| #define DRIVER_NAME			"ramips-spi"
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| #define RALINK_NUM_CHIPSELECTS		1 /* only one slave is supported*/
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| #define RALINK_SPI_WAIT_RDY_MAX_LOOP	2000 /* in usec */
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| 
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| #define RAMIPS_SPI_STAT			0x00
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| #define RAMIPS_SPI_CFG			0x10
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| #define RAMIPS_SPI_CTL			0x14
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| #define RAMIPS_SPI_DATA			0x20
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| 
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| /* SPISTAT register bit field */
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| #define SPISTAT_BUSY			BIT(0)
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| 
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| /* SPICFG register bit field */
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| #define SPICFG_LSBFIRST			0
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| #define SPICFG_MSBFIRST			BIT(8)
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| #define SPICFG_SPICLKPOL		BIT(6)
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| #define SPICFG_RXCLKEDGE_FALLING	BIT(5)
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| #define SPICFG_TXCLKEDGE_FALLING	BIT(4)
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| #define SPICFG_SPICLK_PRESCALE_MASK	0x7
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| #define SPICFG_SPICLK_DIV2		0
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| #define SPICFG_SPICLK_DIV4		1
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| #define SPICFG_SPICLK_DIV8		2
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| #define SPICFG_SPICLK_DIV16		3
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| #define SPICFG_SPICLK_DIV32		4
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| #define SPICFG_SPICLK_DIV64		5
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| #define SPICFG_SPICLK_DIV128		6
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| #define SPICFG_SPICLK_DISABLE		7
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| 
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| /* SPICTL register bit field */
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| #define SPICTL_HIZSDO			BIT(3)
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| #define SPICTL_STARTWR			BIT(2)
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| #define SPICTL_STARTRD			BIT(1)
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| #define SPICTL_SPIENA			BIT(0)
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| 
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| #ifdef DEBUG
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| #define spi_debug(args...) printk(args)
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| #else
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| #define spi_debug(args...)
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| #endif
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| 
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| struct ramips_spi {
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| 	struct work_struct	work;
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| 
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| 	/* Lock access to transfer list.*/
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| 	spinlock_t		lock;
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| 
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| 	struct list_head	msg_queue;
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| 	struct spi_master	*master;
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| 	void __iomem		*base;
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| 	unsigned int		sys_freq;
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| 	unsigned int		speed;
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| 
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| 	struct clk		*clk;
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| };
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| 
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| static struct workqueue_struct *ramips_spi_wq;
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| 
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| static inline struct ramips_spi *ramips_spidev_to_rs(struct spi_device *spi)
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| {
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| 	return spi_master_get_devdata(spi->master);
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| }
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| 
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| static inline u32 ramips_spi_read(struct ramips_spi *rs, u32 reg)
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| {
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| 	return ioread32(rs->base + reg);
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| }
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| 
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| static inline void ramips_spi_write(struct ramips_spi *rs, u32 reg, u32 val)
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| {
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| 	iowrite32(val, rs->base + reg);
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| }
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| 
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| static inline void ramips_spi_setbits(struct ramips_spi *rs, u32 reg, u32 mask)
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| {
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| 	void __iomem *addr = rs->base + reg;
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| 	u32 val;
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| 
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| 	val = ioread32(addr);
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| 	val |= mask;
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| 	iowrite32(val, addr);
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| }
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| 
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| static inline void ramips_spi_clrbits(struct ramips_spi *rs, u32 reg, u32 mask)
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| {
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| 	void __iomem *addr = rs->base + reg;
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| 	u32 val;
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| 
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| 	val = ioread32(addr);
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| 	val &= ~mask;
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| 	iowrite32(val, addr);
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| }
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| 
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| static int ramips_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
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| {
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| 	struct ramips_spi *rs = ramips_spidev_to_rs(spi);
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| 	u32 rate;
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| 	u32 prescale;
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| 	u32 reg;
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| 
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| 	spi_debug("%s: speed:%u\n", __func__, speed);
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| 
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| 	/*
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| 	 * the supported rates are: 2,4,8...128
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| 	 * round up as we look for equal or less speed
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| 	 */
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| 	rate = DIV_ROUND_UP(rs->sys_freq, speed);
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| 	spi_debug("%s: rate-1:%u\n", __func__, rate);
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| 	rate = roundup_pow_of_two(rate);
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| 	spi_debug("%s: rate-2:%u\n", __func__, rate);
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| 
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| 	/* check if requested speed is too small */
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| 	if (rate > 128)
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| 		return -EINVAL;
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| 
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| 	if (rate < 2)
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| 		rate = 2;
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| 
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| 	/* Convert the rate to SPI clock divisor value.	*/
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| 	prescale = ilog2(rate/2);
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| 	spi_debug("%s: prescale:%u\n", __func__, prescale);
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| 
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| 	reg = ramips_spi_read(rs, RAMIPS_SPI_CFG);
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| 	reg = ((reg & ~SPICFG_SPICLK_PRESCALE_MASK) | prescale);
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| 	ramips_spi_write(rs, RAMIPS_SPI_CFG, reg);
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| 	rs->speed = speed;
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| 	return 0;
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| }
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| 
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| /*
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|  * called only when no transfer is active on the bus
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|  */
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| static int
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| ramips_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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| {
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| 	struct ramips_spi *rs = ramips_spidev_to_rs(spi);
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| 	unsigned int speed = spi->max_speed_hz;
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| 	int	rc;
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| 	unsigned int bits_per_word = 8;
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| 
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| 	if ((t != NULL) && t->speed_hz)
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| 		speed = t->speed_hz;
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| 
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| 	if ((t != NULL) && t->bits_per_word)
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| 		bits_per_word = t->bits_per_word;
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| 
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| 	if (rs->speed != speed) {
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| 		spi_debug("%s: speed_hz:%u\n", __func__, speed);
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| 		rc = ramips_spi_baudrate_set(spi, speed);
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| 		if (rc)
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| 			return rc;
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| 	}
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| 
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| 	if (bits_per_word != 8) {
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| 		spi_debug("%s: bad bits_per_word: %u\n", __func__,
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| 			  bits_per_word);
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| 		return -EINVAL;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static void ramips_spi_set_cs(struct ramips_spi *rs, int enable)
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| {
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| 	if (enable)
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| 		ramips_spi_clrbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA);
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| 	else
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| 		ramips_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA);
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| }
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| 
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| static inline int ramips_spi_wait_till_ready(struct ramips_spi *rs)
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| {
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| 	int i;
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| 
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| 	for (i = 0; i < RALINK_SPI_WAIT_RDY_MAX_LOOP; i++) {
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| 		u32 status;
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| 
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| 		status = ramips_spi_read(rs, RAMIPS_SPI_STAT);
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| 		if ((status & SPISTAT_BUSY) == 0)
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| 			return 0;
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| 
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| 		udelay(1);
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| 	}
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| 
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| 	return -ETIMEDOUT;
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| }
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| 
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| static unsigned int
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| ramips_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
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| {
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| 	struct ramips_spi *rs = ramips_spidev_to_rs(spi);
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| 	unsigned count = 0;
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| 	u8 *rx = xfer->rx_buf;
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| 	const u8 *tx = xfer->tx_buf;
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| 	int err;
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| 
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| 	spi_debug("%s(%d): %s %s\n", __func__, xfer->len,
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| 		  (tx != NULL) ? "tx" : "  ",
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| 		  (rx != NULL) ? "rx" : "  ");
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| 
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| 	if (tx) {
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| 		for (count = 0; count < xfer->len; count++) {
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| 			ramips_spi_write(rs, RAMIPS_SPI_DATA, tx[count]);
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| 			ramips_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTWR);
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| 			err = ramips_spi_wait_till_ready(rs);
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| 			if (err) {
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| 				dev_err(&spi->dev, "TX failed, err=%d\n", err);
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| 				goto out;
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| 			}
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| 		}
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| 	}
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| 
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| 	if (rx) {
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| 		for (count = 0; count < xfer->len; count++) {
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| 			ramips_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTRD);
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| 			err = ramips_spi_wait_till_ready(rs);
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| 			if (err) {
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| 				dev_err(&spi->dev, "RX failed, err=%d\n", err);
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| 				goto out;
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| 			}
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| 			rx[count] = (u8) ramips_spi_read(rs, RAMIPS_SPI_DATA);
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| 		}
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| 	}
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| 
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| out:
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| 	return count;
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| }
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| 
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| static void ramips_spi_work(struct work_struct *work)
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| {
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| 	struct ramips_spi *rs =
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| 		container_of(work, struct ramips_spi, work);
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| 
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| 	spin_lock_irq(&rs->lock);
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| 	while (!list_empty(&rs->msg_queue)) {
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| 		struct spi_message *m;
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| 		struct spi_device *spi;
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| 		struct spi_transfer *t = NULL;
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| 		int par_override = 0;
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| 		int status = 0;
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| 		int cs_active = 0;
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| 
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| 		m = container_of(rs->msg_queue.next, struct spi_message,
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| 				 queue);
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| 
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| 		list_del_init(&m->queue);
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| 		spin_unlock_irq(&rs->lock);
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| 
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| 		spi = m->spi;
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| 
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| 		/* Load defaults */
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| 		status = ramips_spi_setup_transfer(spi, NULL);
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| 
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| 		if (status < 0)
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| 			goto msg_done;
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| 
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| 		list_for_each_entry(t, &m->transfers, transfer_list) {
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| 			if (par_override || t->speed_hz || t->bits_per_word) {
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| 				par_override = 1;
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| 				status = ramips_spi_setup_transfer(spi, t);
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| 				if (status < 0)
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| 					break;
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| 				if (!t->speed_hz && !t->bits_per_word)
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| 					par_override = 0;
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| 			}
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| 
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| 			if (!cs_active) {
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| 				ramips_spi_set_cs(rs, 1);
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| 				cs_active = 1;
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| 			}
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| 
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| 			if (t->len)
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| 				m->actual_length +=
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| 					ramips_spi_write_read(spi, t);
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| 
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| 			if (t->delay_usecs)
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| 				udelay(t->delay_usecs);
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| 
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| 			if (t->cs_change) {
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| 				ramips_spi_set_cs(rs, 0);
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| 				cs_active = 0;
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| 			}
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| 		}
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| 
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| msg_done:
 | |
| 		if (cs_active)
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| 			ramips_spi_set_cs(rs, 0);
 | |
| 
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| 		m->status = status;
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| 		m->complete(m->context);
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| 
 | |
| 		spin_lock_irq(&rs->lock);
 | |
| 	}
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| 
 | |
| 	spin_unlock_irq(&rs->lock);
 | |
| }
 | |
| 
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| static int ramips_spi_setup(struct spi_device *spi)
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| {
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| 	struct ramips_spi *rs = ramips_spidev_to_rs(spi);
 | |
| 
 | |
| 	if ((spi->max_speed_hz == 0) ||
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| 	    (spi->max_speed_hz > (rs->sys_freq / 2)))
 | |
| 		spi->max_speed_hz = (rs->sys_freq / 2);
 | |
| 
 | |
| 	if (spi->max_speed_hz < (rs->sys_freq/128)) {
 | |
| 		dev_err(&spi->dev, "setup: requested speed too low %d Hz\n",
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| 			spi->max_speed_hz);
 | |
| 		return -EINVAL;
 | |
| 	}
 | |
| 
 | |
| 	if (spi->bits_per_word != 0 && spi->bits_per_word != 8) {
 | |
| 		dev_err(&spi->dev,
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| 			"setup: requested bits per words - os wrong %d bpw\n",
 | |
| 			spi->bits_per_word);
 | |
| 		return -EINVAL;
 | |
| 	}
 | |
| 
 | |
| 	if (spi->bits_per_word == 0)
 | |
| 		spi->bits_per_word = 8;
 | |
| 
 | |
| 	/*
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| 	 * baudrate & width will be set ramips_spi_setup_transfer
 | |
| 	 */
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| static int ramips_spi_transfer(struct spi_device *spi, struct spi_message *m)
 | |
| {
 | |
| 	struct ramips_spi *rs;
 | |
| 	struct spi_transfer *t = NULL;
 | |
| 	unsigned long flags;
 | |
| 
 | |
| 	m->actual_length = 0;
 | |
| 	m->status = 0;
 | |
| 
 | |
| 	/* reject invalid messages and transfers */
 | |
| 	if (list_empty(&m->transfers) || !m->complete)
 | |
| 		return -EINVAL;
 | |
| 
 | |
| 	rs = ramips_spidev_to_rs(spi);
 | |
| 
 | |
| 	list_for_each_entry(t, &m->transfers, transfer_list) {
 | |
| 		unsigned int bits_per_word = spi->bits_per_word;
 | |
| 
 | |
| 		if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
 | |
| 			dev_err(&spi->dev,
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| 				"message rejected : "
 | |
| 				"invalid transfer data buffers\n");
 | |
| 			goto msg_rejected;
 | |
| 		}
 | |
| 
 | |
| 		if (t->bits_per_word)
 | |
| 			bits_per_word = t->bits_per_word;
 | |
| 
 | |
| 		if (bits_per_word != 8) {
 | |
| 			dev_err(&spi->dev,
 | |
| 				"message rejected : "
 | |
| 				"invalid transfer bits_per_word (%d bits)\n",
 | |
| 				bits_per_word);
 | |
| 			goto msg_rejected;
 | |
| 		}
 | |
| 
 | |
| 		if (t->speed_hz && t->speed_hz < (rs->sys_freq/128)) {
 | |
| 			dev_err(&spi->dev,
 | |
| 				"message rejected : "
 | |
| 				"device min speed (%d Hz) exceeds "
 | |
| 				"required transfer speed (%d Hz)\n",
 | |
| 				(rs->sys_freq/128), t->speed_hz);
 | |
| 			goto msg_rejected;
 | |
| 		}
 | |
| 	}
 | |
| 
 | |
| 
 | |
| 	spin_lock_irqsave(&rs->lock, flags);
 | |
| 	list_add_tail(&m->queue, &rs->msg_queue);
 | |
| 	queue_work(ramips_spi_wq, &rs->work);
 | |
| 	spin_unlock_irqrestore(&rs->lock, flags);
 | |
| 
 | |
| 	return 0;
 | |
| msg_rejected:
 | |
| 	/* Message rejected and not queued */
 | |
| 	m->status = -EINVAL;
 | |
| 	if (m->complete)
 | |
| 		m->complete(m->context);
 | |
| 	return -EINVAL;
 | |
| }
 | |
| 
 | |
| static void __init ramips_spi_reset(struct ramips_spi *rs)
 | |
| {
 | |
| 	ramips_spi_write(rs, RAMIPS_SPI_CFG,
 | |
| 			 SPICFG_MSBFIRST | SPICFG_TXCLKEDGE_FALLING |
 | |
| 			 SPICFG_SPICLK_DIV16 | SPICFG_SPICLKPOL);
 | |
| 	ramips_spi_write(rs, RAMIPS_SPI_CTL, SPICTL_HIZSDO | SPICTL_SPIENA);
 | |
| }
 | |
| 
 | |
| static int __init ramips_spi_probe(struct platform_device *pdev)
 | |
| {
 | |
| 	struct spi_master *master;
 | |
| 	struct ramips_spi *rs;
 | |
| 	struct resource *r;
 | |
| 	int status = 0;
 | |
| 
 | |
| 	master = spi_alloc_master(&pdev->dev, sizeof(*rs));
 | |
| 	if (master == NULL) {
 | |
| 		dev_dbg(&pdev->dev, "master allocation failed\n");
 | |
| 		return -ENOMEM;
 | |
| 	}
 | |
| 
 | |
| 	if (pdev->id != -1)
 | |
| 		master->bus_num = pdev->id;
 | |
| 
 | |
| 	/* we support only mode 0, and no options */
 | |
| 	master->mode_bits = 0;
 | |
| 
 | |
| 	master->setup = ramips_spi_setup;
 | |
| 	master->transfer = ramips_spi_transfer;
 | |
| 	master->num_chipselect = RALINK_NUM_CHIPSELECTS;
 | |
| 
 | |
| 	dev_set_drvdata(&pdev->dev, master);
 | |
| 
 | |
| 	rs = spi_master_get_devdata(master);
 | |
| 	rs->master = master;
 | |
| 
 | |
| 	rs->clk = clk_get(NULL, "sys");
 | |
| 	if (IS_ERR(rs->clk)) {
 | |
| 		status = PTR_ERR(rs->clk);
 | |
| 		dev_err(&pdev->dev, "unable to get SYS clock, err=%d\n",
 | |
| 			status);
 | |
| 		goto out_put_master;
 | |
| 	}
 | |
| 
 | |
| 	status = clk_enable(rs->clk);
 | |
| 	if (status)
 | |
| 		goto out_put_clk;
 | |
| 
 | |
| 	rs->sys_freq = clk_get_rate(rs->clk);
 | |
| 	spi_debug("%s: sys_freq: %ld\n", __func__, rs->sys_freq);
 | |
| 
 | |
| 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 | |
| 	if (r == NULL) {
 | |
| 		status = -ENODEV;
 | |
| 		goto out_disable_clk;
 | |
| 	}
 | |
| 
 | |
| 	if (!request_mem_region(r->start, (r->end - r->start) + 1,
 | |
| 				dev_name(&pdev->dev))) {
 | |
| 		status = -EBUSY;
 | |
| 		goto out_disable_clk;
 | |
| 	}
 | |
| 
 | |
| 	rs->base = ioremap(r->start, resource_size(r));
 | |
| 	if (rs->base == NULL) {
 | |
| 		dev_err(&pdev->dev, "ioremap failed\n");
 | |
| 		status = -ENOMEM;
 | |
| 		goto out_rel_mem;
 | |
| 	}
 | |
| 
 | |
| 	INIT_WORK(&rs->work, ramips_spi_work);
 | |
| 
 | |
| 	spin_lock_init(&rs->lock);
 | |
| 	INIT_LIST_HEAD(&rs->msg_queue);
 | |
| 
 | |
| 	ramips_spi_reset(rs);
 | |
| 
 | |
| 	status = spi_register_master(master);
 | |
| 	if (status)
 | |
| 		goto out_unmap_base;
 | |
| 
 | |
| 	return 0;
 | |
| 
 | |
| out_unmap_base:
 | |
| 	iounmap(rs->base);
 | |
| out_rel_mem:
 | |
| 	release_mem_region(r->start, (r->end - r->start) + 1);
 | |
| out_disable_clk:
 | |
| 	clk_disable(rs->clk);
 | |
| out_put_clk:
 | |
| 	clk_put(rs->clk);
 | |
| out_put_master:
 | |
| 	spi_master_put(master);
 | |
| 	return status;
 | |
| }
 | |
| 
 | |
| static int ramips_spi_remove(struct platform_device *pdev)
 | |
| {
 | |
| 	struct spi_master *master;
 | |
| 	struct ramips_spi *rs;
 | |
| 	struct resource *r;
 | |
| 
 | |
| 	master = dev_get_drvdata(&pdev->dev);
 | |
| 	rs = spi_master_get_devdata(master);
 | |
| 
 | |
| 	cancel_work_sync(&rs->work);
 | |
| 
 | |
| 	iounmap(rs->base);
 | |
| 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 | |
| 	release_mem_region(r->start, (r->end - r->start) + 1);
 | |
| 
 | |
| 	clk_disable(rs->clk);
 | |
| 	clk_put(rs->clk);
 | |
| 	spi_unregister_master(master);
 | |
| 
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| MODULE_ALIAS("platform:" DRIVER_NAME);
 | |
| 
 | |
| static struct platform_driver ramips_spi_driver = {
 | |
| 	.driver = {
 | |
| 		.name	= DRIVER_NAME,
 | |
| 		.owner	= THIS_MODULE,
 | |
| 	},
 | |
| 	.remove		= ramips_spi_remove,
 | |
| };
 | |
| 
 | |
| static int __init ramips_spi_init(void)
 | |
| {
 | |
| 	ramips_spi_wq = create_singlethread_workqueue(
 | |
| 				ramips_spi_driver.driver.name);
 | |
| 	if (ramips_spi_wq == NULL)
 | |
| 		return -ENOMEM;
 | |
| 
 | |
| 	return platform_driver_probe(&ramips_spi_driver, ramips_spi_probe);
 | |
| }
 | |
| module_init(ramips_spi_init);
 | |
| 
 | |
| static void __exit ramips_spi_exit(void)
 | |
| {
 | |
| 	flush_workqueue(ramips_spi_wq);
 | |
| 	platform_driver_unregister(&ramips_spi_driver);
 | |
| 
 | |
| 	destroy_workqueue(ramips_spi_wq);
 | |
| }
 | |
| module_exit(ramips_spi_exit);
 | |
| 
 | |
| MODULE_DESCRIPTION("Ralink SPI driver");
 | |
| MODULE_AUTHOR("Sergiy <piratfm@gmail.com>");
 | |
| MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 | |
| MODULE_LICENSE("GPL");
 |