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5ad826f48a
Replace stmmac pcs fix with upstream version. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
111 lines
3.4 KiB
Diff
111 lines
3.4 KiB
Diff
From 8bca458990dd8c6d001b2fb52063aa18e8ca7444 Mon Sep 17 00:00:00 2001
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From: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
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Date: Tue, 14 Jun 2022 13:22:28 +0200
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Subject: [PATCH 2/2] net: ethernet: stmmac: reset force speed bit for ipq806x
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Some bootloader may set the force speed regs even if the actual
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interface should use autonegotiation between PCS and PHY.
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This cause the complete malfuction of the interface.
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To fix this correctly reset the force speed regs if a fixed-link is not
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defined in the DTS. With a fixed-link node correctly configure the
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forced speed regs to handle any misconfiguration by the bootloader.
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Reported-by: Mark Mentovai <mark@moxienet.com>
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Co-developed-by: Mark Mentovai <mark@moxienet.com>
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Signed-off-by: Mark Mentovai <mark@moxienet.com>
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Signed-off-by: Christian 'Ansuel' Marangi <ansuelsmth@gmail.com>
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Link: https://lore.kernel.org/r/20220614112228.1998-2-ansuelsmth@gmail.com
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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.../ethernet/stmicro/stmmac/dwmac-ipq806x.c | 64 +++++++++++++++++++
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1 file changed, 64 insertions(+)
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--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
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@@ -66,6 +66,17 @@
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#define NSS_COMMON_CLK_DIV_SGMII_100 4
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#define NSS_COMMON_CLK_DIV_SGMII_10 49
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+#define QSGMII_PCS_ALL_CH_CTL 0x80
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+#define QSGMII_PCS_CH_SPEED_FORCE BIT(1)
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+#define QSGMII_PCS_CH_SPEED_10 0x0
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+#define QSGMII_PCS_CH_SPEED_100 BIT(2)
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+#define QSGMII_PCS_CH_SPEED_1000 BIT(3)
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+#define QSGMII_PCS_CH_SPEED_MASK (QSGMII_PCS_CH_SPEED_FORCE | \
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+ QSGMII_PCS_CH_SPEED_10 | \
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+ QSGMII_PCS_CH_SPEED_100 | \
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+ QSGMII_PCS_CH_SPEED_1000)
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+#define QSGMII_PCS_CH_SPEED_SHIFT(x) ((x) * 4)
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+
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#define QSGMII_PCS_CAL_LCKDT_CTL 0x120
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#define QSGMII_PCS_CAL_LCKDT_CTL_RST BIT(19)
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@@ -253,6 +264,55 @@ static void ipq806x_gmac_fix_mac_speed(v
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ipq806x_gmac_set_speed(gmac, speed);
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}
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+static int
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+ipq806x_gmac_configure_qsgmii_pcs_speed(struct ipq806x_gmac *gmac)
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+{
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+ struct platform_device *pdev = gmac->pdev;
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+ struct device *dev = &pdev->dev;
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+ struct device_node *dn;
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+ int link_speed;
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+ int val = 0;
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+ int ret;
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+
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+ /* Some bootloader may apply wrong configuration and cause
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+ * not functioning port. If fixed link is not set,
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+ * reset the force speed bit.
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+ */
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+ if (!of_phy_is_fixed_link(pdev->dev.of_node))
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+ goto write;
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+
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+ dn = of_get_child_by_name(pdev->dev.of_node, "fixed-link");
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+ ret = of_property_read_u32(dn, "speed", &link_speed);
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+ of_node_put(dn);
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+ if (ret) {
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+ dev_err(dev, "found fixed-link node with no speed");
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+ return ret;
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+ }
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+
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+ val = QSGMII_PCS_CH_SPEED_FORCE;
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+
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+ switch (link_speed) {
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+ case SPEED_1000:
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+ val |= QSGMII_PCS_CH_SPEED_1000;
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+ break;
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+ case SPEED_100:
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+ val |= QSGMII_PCS_CH_SPEED_100;
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+ break;
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+ case SPEED_10:
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+ val |= QSGMII_PCS_CH_SPEED_10;
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+ break;
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+ }
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+
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+write:
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+ regmap_update_bits(gmac->qsgmii_csr, QSGMII_PCS_ALL_CH_CTL,
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+ QSGMII_PCS_CH_SPEED_MASK <<
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+ QSGMII_PCS_CH_SPEED_SHIFT(gmac->id),
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+ val <<
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+ QSGMII_PCS_CH_SPEED_SHIFT(gmac->id));
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+
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+ return 0;
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+}
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+
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static const struct soc_device_attribute ipq806x_gmac_soc_v1[] = {
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{
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.revision = "1.*",
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@@ -400,6 +460,10 @@ static int ipq806x_gmac_probe(struct pla
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err = ipq806x_gmac_configure_qsgmii_params(gmac);
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if (err)
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goto err_remove_config_dt;
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+
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+ err = ipq806x_gmac_configure_qsgmii_pcs_speed(gmac);
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+ if (err)
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+ goto err_remove_config_dt;
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}
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plat_dat->has_gmac = true;
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