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02629d8f87
Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
60 lines
1.9 KiB
Diff
60 lines
1.9 KiB
Diff
From b5e19b657e352d565c5ddeae5f6dfd542de9d7e5 Mon Sep 17 00:00:00 2001
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From: Andy Gross <agross@codeaurora.org>
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Date: Mon, 10 Mar 2014 16:40:19 -0500
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Subject: [PATCH 044/182] dmaengine: qcom_bam_dma: Add device tree binding
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Add device tree binding support for the QCOM BAM DMA driver.
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Acked-by: Kumar Gala <galak@codeaurora.org>
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Signed-off-by: Andy Gross <agross@codeaurora.org>
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Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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---
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.../devicetree/bindings/dma/qcom_bam_dma.txt | 41 ++++++++++++++++++++
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1 file changed, 41 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt
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@@ -0,0 +1,41 @@
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+QCOM BAM DMA controller
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+
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+Required properties:
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+- compatible: must contain "qcom,bam-v1.4.0" for MSM8974
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+- reg: Address range for DMA registers
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+- interrupts: Should contain the one interrupt shared by all channels
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+- #dma-cells: must be <1>, the cell in the dmas property of the client device
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+ represents the channel number
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+- clocks: required clock
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+- clock-names: must contain "bam_clk" entry
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+- qcom,ee : indicates the active Execution Environment identifier (0-7) used in
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+ the secure world.
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+
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+Example:
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+
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+ uart-bam: dma@f9984000 = {
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+ compatible = "qcom,bam-v1.4.0";
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+ reg = <0xf9984000 0x15000>;
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+ interrupts = <0 94 0>;
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+ clocks = <&gcc GCC_BAM_DMA_AHB_CLK>;
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+ clock-names = "bam_clk";
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+ #dma-cells = <1>;
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+ qcom,ee = <0>;
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+ };
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+
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+DMA clients must use the format described in the dma.txt file, using a two cell
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+specifier for each channel.
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+
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+Example:
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+ serial@f991e000 {
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+ compatible = "qcom,msm-uart";
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+ reg = <0xf991e000 0x1000>
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+ <0xf9944000 0x19000>;
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+ interrupts = <0 108 0>;
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+ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
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+ <&gcc GCC_BLSP1_AHB_CLK>;
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+ clock-names = "core", "iface";
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+
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+ dmas = <&uart-bam 0>, <&uart-bam 1>;
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+ dma-names = "rx", "tx";
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+ };
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