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af015f956c
Tested on the following boards: ALFA AP96 TL-MR3220 v1 TL-WR1043ND v1 TL-WR2543ND v1 TL-WR703N v1 TL-WR741ND v1 TL-WR741ND v4 WNDR3700 v1 WZR-HP-G300NH SVN-Revision: 29868
43 lines
1.3 KiB
Diff
43 lines
1.3 KiB
Diff
From 48b7e765e6e097d20d809fadd17a4355d26ad6d5 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 11 Jan 2012 20:06:35 +0100
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Subject: [PATCH 1/7] spi/ath79: add delay between SCK changes
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The driver uses the "as fast as it can" approach
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to drive the SCK signal. However this does not
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work with certain low speed SPI chips (e.g. the
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PCF2123 RTC chip). Add per-bit slowdowns in order
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to be able to use the driver with such chips as
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well.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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drivers/spi/spi-ath79.c | 8 ++++++++
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1 files changed, 8 insertions(+), 0 deletions(-)
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--- a/drivers/spi/spi-ath79.c
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+++ b/drivers/spi/spi-ath79.c
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@@ -52,6 +52,12 @@ static inline struct ath79_spi *ath79_sp
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return spi_master_get_devdata(spi->master);
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}
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+static inline void ath79_spi_delay(unsigned nsecs)
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+{
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+ if (nsecs)
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+ ndelay(nsecs);
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+}
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+
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static void ath79_spi_chipselect(struct spi_device *spi, int is_active)
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{
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struct ath79_spi *sp = ath79_spidev_to_sp(spi);
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@@ -184,7 +190,9 @@ static u32 ath79_spi_txrx_mode0(struct s
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/* setup MSB (to slave) on trailing edge */
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ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
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+ ath79_spi_delay(nsecs);
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ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out | AR71XX_SPI_IOC_CLK);
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+ ath79_spi_delay(nsecs);
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word <<= 1;
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}
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