mirror of
git://git.openwrt.org/openwrt/openwrt.git
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64f343a881
This updates the mac80211 backport. The removed patches are already integrated in the upstream version. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
167 lines
5.4 KiB
Diff
167 lines
5.4 KiB
Diff
--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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@@ -8469,6 +8469,155 @@ static void rt2800_rf_self_txdc_cal(stru
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rt2x00_info(rt2x00dev, "RF Tx self calibration end\n");
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}
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+static int rt2800_calcrcalibrationcode(struct rt2x00_dev *rt2x00dev, int d1, int d2)
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+{
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+ int calcode;
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+ calcode = ((d2 - d1) * 1000) / 43;
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+ if ((calcode%10) >= 5)
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+ calcode += 10;
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+ calcode = (calcode / 10);
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+
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+ return calcode;
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+}
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+
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+static void rt2800_r_calibration(struct rt2x00_dev *rt2x00dev)
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+{
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+ u32 savemacsysctrl;
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+ u8 saverfb0r1, saverfb0r34, saverfb0r35;
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+ u8 saverfb5r4, saverfb5r17, saverfb5r18;
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+ u8 saverfb5r19, saverfb5r20;
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+ u8 savebbpr22, savebbpr47, savebbpr49;
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+ u8 bytevalue = 0;
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+ int rcalcode;
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+ u8 r_cal_code = 0;
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+ char d1 = 0, d2 = 0;
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+ u8 rfvalue;
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+ u32 MAC_RF_BYPASS0, MAC_RF_CONTROL0, MAC_PWR_PIN_CFG;
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+ u32 maccfg, macstatus;
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+ int i;
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+
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+ saverfb0r1 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 1);
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+ saverfb0r34 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 34);
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+ saverfb0r35 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 35);
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+ saverfb5r4 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 4);
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+ saverfb5r17 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 17);
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+ saverfb5r18 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 18);
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+ saverfb5r19 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 19);
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+ saverfb5r20 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 20);
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+
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+ savebbpr22 = rt2800_bbp_read(rt2x00dev, 22);
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+ savebbpr47 = rt2800_bbp_read(rt2x00dev, 47);
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+ savebbpr49 = rt2800_bbp_read(rt2x00dev, 49);
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+
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+ savemacsysctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
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+ MAC_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
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+ MAC_RF_CONTROL0 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
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+ MAC_PWR_PIN_CFG = rt2800_register_read(rt2x00dev, PWR_PIN_CFG);
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+
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+ maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
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+ maccfg &= (~0x04);
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+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
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+
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+ for (i = 0; i < 10000; i++) {
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+ macstatus = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
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+ if (macstatus & 0x1)
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+ udelay(50);
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+ else
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+ break;
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+ }
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+
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+ if (i == 10000)
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+ rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");
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+
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+ maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
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+ maccfg &= (~0x04);
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+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
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+
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+ for (i = 0; i < 10000; i++) {
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+ macstatus = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
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+ if (macstatus & 0x2)
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+ udelay(50);
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+ else
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+ break;
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+ }
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+
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+ if (i == 10000)
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+ rt2x00_warn(rt2x00dev, "Wait MAC Rx Status to MAX !!!\n");
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+
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+ rfvalue = (MAC_RF_BYPASS0 | 0x3004);
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+ rt2800_register_write(rt2x00dev, RF_BYPASS0, rfvalue);
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+ rfvalue = (MAC_RF_CONTROL0 | (~0x3002));
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+ rt2800_register_write(rt2x00dev, RF_CONTROL0, rfvalue);
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+
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, 0x27);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, 0x80);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0x83);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x00);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x20);
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+
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, 0x00);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, 0x13);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x00);
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+
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+ rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x1);
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+
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+ rt2800_bbp_write(rt2x00dev, 47, 0x04);
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+ rt2800_bbp_write(rt2x00dev, 22, 0x80);
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+ udelay(100);
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+ bytevalue = rt2800_bbp_read(rt2x00dev, 49);
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+ if (bytevalue > 128)
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+ d1 = bytevalue - 256;
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+ else
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+ d1 = (char)bytevalue;
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+ rt2800_bbp_write(rt2x00dev, 22, 0x0);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x01);
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+
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+ rt2800_bbp_write(rt2x00dev, 22, 0x80);
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+ udelay(100);
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+ bytevalue = rt2800_bbp_read(rt2x00dev, 49);
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+ if (bytevalue > 128)
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+ d2 = bytevalue - 256;
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+ else
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+ d2 = (char)bytevalue;
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+ rt2800_bbp_write(rt2x00dev, 22, 0x0);
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+
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+ rcalcode = rt2800_calcrcalibrationcode(rt2x00dev, d1, d2);
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+ if (rcalcode < 0)
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+ r_cal_code = 256 + rcalcode;
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+ else
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+ r_cal_code = (u8)rcalcode;
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+
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 7, r_cal_code);
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+
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+ rt2800_bbp_write(rt2x00dev, 22, 0x0);
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+
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+ bytevalue = rt2800_bbp_read(rt2x00dev, 21);
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+ bytevalue |= 0x1;
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+ rt2800_bbp_write(rt2x00dev, 21, bytevalue);
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+ bytevalue = rt2800_bbp_read(rt2x00dev, 21);
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+ bytevalue &= (~0x1);
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+ rt2800_bbp_write(rt2x00dev, 21, bytevalue);
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+
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, saverfb0r1);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, saverfb0r34);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, saverfb0r35);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, saverfb5r17);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, saverfb5r18);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, saverfb5r19);
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+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, saverfb5r20);
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+
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+ rt2800_bbp_write(rt2x00dev, 22, savebbpr22);
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+ rt2800_bbp_write(rt2x00dev, 47, savebbpr47);
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+ rt2800_bbp_write(rt2x00dev, 49, savebbpr49);
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+
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+ rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0);
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+ rt2800_register_write(rt2x00dev, RF_CONTROL0, MAC_RF_CONTROL0);
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+
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+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl);
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+ rt2800_register_write(rt2x00dev, PWR_PIN_CFG, MAC_PWR_PIN_CFG);
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+}
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+
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static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
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bool set_bw, bool is_ht40)
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{
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@@ -9076,6 +9225,7 @@ static void rt2800_init_rfcsr_6352(struc
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rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
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rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
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+ rt2800_r_calibration(rt2x00dev);
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rt2800_rf_self_txdc_cal(rt2x00dev);
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rt2800_bw_filter_calibration(rt2x00dev, true);
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rt2800_bw_filter_calibration(rt2x00dev, false);
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