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1f153558a3
- fw_passed_dtb and others were replaced to get_fdt() function[1] - __appended_dtb defined by asm/bootinfo.h[2] [1]: https://www.spinics.net/lists/linux-mips/msg03332.html [2]: https://www.spinics.net/lists/linux-mips/msg03332.html Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
103 lines
2.1 KiB
C
103 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Setup for the Realtek RTL838X SoC:
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* Memory, Timer and Serial
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*
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* Copyright (C) 2020 B. Koblitz
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* based on the original BSP by
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* Copyright (C) 2006-2012 Tony Wu (tonywu@realtek.com)
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*
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*/
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#include <linux/console.h>
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#include <linux/init.h>
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/of_fdt.h>
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#include <linux/irqchip.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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#include <asm/bootinfo.h>
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#include <asm/time.h>
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#include <asm/prom.h>
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#include <asm/smp-ops.h>
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#include "mach-rtl83xx.h"
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extern struct rtl83xx_soc_info soc_info;
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void __init plat_mem_setup(void)
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{
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void *dtb;
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set_io_port_base(KSEG1);
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dtb = get_fdt();
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if (!dtb)
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panic("no dtb found");
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/*
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* Load the devicetree. This causes the chosen node to be
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* parsed resulting in our memory appearing
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*/
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__dt_setup_arch(dtb);
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}
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void plat_time_init_fallback(void)
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{
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struct device_node *np;
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u32 freq = 500000000;
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np = of_find_node_by_name(NULL, "cpus");
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if (!np) {
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pr_err("Missing 'cpus' DT node, using default frequency.");
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} else {
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if (of_property_read_u32(np, "frequency", &freq) < 0)
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pr_err("No 'frequency' property in DT, using default.");
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else
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pr_info("CPU frequency from device tree: %dMHz", freq / 1000000);
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of_node_put(np);
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}
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mips_hpt_frequency = freq / 2;
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}
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void __init plat_time_init(void)
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{
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/*
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* Initialization routine resembles generic MIPS plat_time_init() with
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* lazy error handling. The final fallback is only needed until we have
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* converted all device trees to new clock syntax.
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*/
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struct device_node *np;
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struct clk *clk;
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of_clk_init(NULL);
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mips_hpt_frequency = 0;
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np = of_get_cpu_node(0, NULL);
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if (!np) {
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pr_err("Failed to get CPU node\n");
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} else {
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clk = of_clk_get(np, 0);
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if (IS_ERR(clk)) {
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pr_err("Failed to get CPU clock: %ld\n", PTR_ERR(clk));
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} else {
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mips_hpt_frequency = clk_get_rate(clk) / 2;
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clk_put(clk);
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}
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}
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if (!mips_hpt_frequency)
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plat_time_init_fallback();
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timer_probe();
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}
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void __init arch_init_irq(void)
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{
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irqchip_init();
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}
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