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623180a422
RTL93XX reached the point where the SerDes' are no longer treated as regular PHYs. Instead, they are managed by the dedicated PCS driver. Thus, all device tree definitions should follow this change. Remove the pseudo-PHYs for the SerDes (so far usually defined with macro INTERNAL_PHY) and corresponding 'phy-handle's from all SFP ports. This removes a long-lasting confusion from our Realtek driver(s). Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/20577 Signed-off-by: Robert Marko <robimarko@gmail.com>
67 lines
1.4 KiB
Plaintext
67 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/dts-v1/;
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#include "rtl9302_plasmacloud_common.dtsi"
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/ {
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compatible = "plasmacloud,psx10", "realtek,rtl838x-soc";
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model = "Plasma Cloud PSX10";
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i2c1: i2c-gpio1 {
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compatible = "i2c-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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sda-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
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i2c-gpio,delay-us = <5>; /* ~100 kHz */
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};
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sfp0: sfp-lan9 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 12 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&gpio0 22 GPIO_ACTIVE_HIGH>;
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};
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sfp1: sfp-lan10 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c1>;
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los-gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio0 20 GPIO_ACTIVE_LOW>;
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tx-disable-gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
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};
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};
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&switch0 {
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ports {
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port@26 {
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reg = <26>;
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label = "lan9";
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pcs-handle = <&serdes8>;
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phy-mode = "1000base-x";
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sfp = <&sfp0>;
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led-set = <0>;
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managed = "in-band-status";
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nvmem-cells = <&macaddr_ubootenv_ethaddr 9>;
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nvmem-cell-names = "mac-address";
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};
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port@27 {
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reg = <27>;
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label = "lan10";
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pcs-handle = <&serdes9>;
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phy-mode = "1000base-x";
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sfp = <&sfp1>;
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led-set = <0>;
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managed = "in-band-status";
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nvmem-cells = <&macaddr_ubootenv_ethaddr 10>;
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nvmem-cell-names = "mac-address";
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};
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};
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};
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