mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2025-10-31 14:04:26 -04:00
b789a588b1
Removed upstreamed:
generic-backport/774-v5.15-1-igc-remove-_I_PHY_ID-checking.patch
generic-backport/774-v5.15-2-igc-remove-phy-type-checking.patch
All patches automatically rebased.
Build system: x86_64
Build-tested: ipq806x/R7800
Signed-off-by: John Audia <therealgraysky@proton.me>
31 lines
720 B
Diff
31 lines
720 B
Diff
--- a/arch/mips/lantiq/xway/sysctrl.c
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+++ b/arch/mips/lantiq/xway/sysctrl.c
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@@ -440,6 +440,20 @@ static void clkdev_add_clkout(void)
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}
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}
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+static void set_phy_clock_source(struct device_node *np_cgu)
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+{
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+ u32 phy_clk_src, ifcc;
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+
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+ if (!np_cgu)
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+ return;
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+
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+ if (of_property_read_u32(np_cgu, "lantiq,phy-clk-src", &phy_clk_src))
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+ return;
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+
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+ ifcc = ltq_cgu_r32(ifccr) & ~(0x1c);
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+ ltq_cgu_w32(ifcc | (phy_clk_src << 2), ifccr);
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+}
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+
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/* bring up all register ranges that we need for basic system control */
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void __init ltq_soc_init(void)
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{
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@@ -605,4 +619,6 @@ void __init ltq_soc_init(void)
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clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0);
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}
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usb_set_clock();
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+
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+ set_phy_clock_source(np_cgu);
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}
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