mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2025-10-31 05:54:26 -04:00
88ca6390ea
Refresh patches on all 4.4 supported platforms. Compile & run tested: lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
34 lines
1020 B
Diff
34 lines
1020 B
Diff
From 2f3ea65dc8909cbf4116bd74b3dea8d25749508f Mon Sep 17 00:00:00 2001
|
|
From: Zhao Qiang <qiang.zhao@nxp.com>
|
|
Date: Wed, 23 Nov 2016 11:29:45 +0800
|
|
Subject: [PATCH 235/238] pci/layerscape: fix pci lut offset issue
|
|
|
|
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
|
|
---
|
|
drivers/pci/host/pci-layerscape.c | 13 ++++---------
|
|
1 file changed, 4 insertions(+), 9 deletions(-)
|
|
|
|
--- a/drivers/pci/host/pci-layerscape.c
|
|
+++ b/drivers/pci/host/pci-layerscape.c
|
|
@@ -158,16 +158,11 @@ static void ls1021_pcie_host_init(struct
|
|
static int ls_pcie_link_up(struct pcie_port *pp)
|
|
{
|
|
struct ls_pcie *pcie = to_ls_pcie(pp);
|
|
- u32 state, offset;
|
|
+ u32 state;
|
|
|
|
- if (of_get_property(pp->dev->of_node, "fsl,lut_diff", NULL))
|
|
- offset = 0x407fc;
|
|
- else
|
|
- offset = PCIE_LUT_DBG;
|
|
-
|
|
- state = (ioread32(pcie->lut + offset) >>
|
|
- pcie->drvdata->ltssm_shift) &
|
|
- LTSSM_STATE_MASK;
|
|
+ state = (ioread32(pcie->lut + pcie->drvdata->lut_dbg) >>
|
|
+ pcie->drvdata->ltssm_shift) &
|
|
+ LTSSM_STATE_MASK;
|
|
|
|
if (state < LTSSM_PCIE_L0)
|
|
return 0;
|