mirror of
git://git.openwrt.org/openwrt/openwrt.git
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321823ba05
Build and boot tested on the following hardware: * GW54xx * GW53xx * GW52xx * GW51xx * GW552x * GW551x Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com> SVN-Revision: 48248
265 lines
4.8 KiB
Diff
265 lines
4.8 KiB
Diff
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
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@@ -174,6 +174,24 @@
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status = "okay";
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};
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+&pwm2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
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+ status = "disabled";
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+};
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+
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+&pwm3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
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+ status = "disabled";
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+};
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+
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+&pwm4 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
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+ status = "disabled";
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+};
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+
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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@@ -294,6 +312,24 @@
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>;
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};
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+ pinctrl_pwm2: pwm2grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
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+ >;
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+ };
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+
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+ pinctrl_pwm3: pwm3grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
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+ >;
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+ };
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+
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+ pinctrl_pwm4: pwm4grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
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+ >;
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+ };
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+
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
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--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
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@@ -282,6 +282,18 @@
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status = "okay";
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};
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+&pwm2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
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+ status = "disabled";
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+};
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+
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+&pwm3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
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+ status = "disabled";
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+};
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+
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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@@ -436,6 +448,18 @@
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>;
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};
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+ pinctrl_pwm2: pwm2grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
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+ >;
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+ };
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+
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+ pinctrl_pwm3: pwm3grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
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+ >;
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+ };
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+
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pinctrl_pwm4: pwm4grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
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--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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@@ -287,6 +287,18 @@
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};
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};
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+&pwm2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
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+ status = "disabled";
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+};
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+
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+&pwm3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
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+ status = "disabled";
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+};
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+
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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@@ -442,6 +454,18 @@
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>;
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};
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+ pinctrl_pwm2: pwm2grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
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+ >;
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+ };
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+
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+ pinctrl_pwm3: pwm3grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
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+ >;
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+ };
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+
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pinctrl_pwm4: pwm4grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
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--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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@@ -378,6 +378,24 @@
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};
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};
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+&pwm1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
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+ status = "disabled";
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+};
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+
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+&pwm2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
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+ status = "disabled";
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+};
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+
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+&pwm3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
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+ status = "disabled";
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+};
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+
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&pwm4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm4>;
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@@ -537,6 +555,24 @@
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>;
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};
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+ pinctrl_pwm1: pwm1grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
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+ >;
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+ };
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+
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+ pinctrl_pwm2: pwm2grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
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+ >;
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+ };
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+
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+ pinctrl_pwm3: pwm3grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
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+ >;
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+ };
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+
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pinctrl_pwm4: pwm4grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
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--- a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
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@@ -198,6 +198,18 @@
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status = "okay";
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};
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+&pwm2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
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+ status = "disabled";
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+};
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+
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+&pwm3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
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+ status = "disabled";
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+};
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+
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&ssi1 {
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status = "okay";
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};
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@@ -290,6 +302,18 @@
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>;
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};
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+ pinctrl_pwm2: pwm2grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
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+ >;
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+ };
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+
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+ pinctrl_pwm3: pwm3grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
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+ >;
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+ };
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+
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
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--- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
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@@ -164,6 +164,18 @@
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status = "okay";
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};
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+&pwm2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
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+ status = "disabled";
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+};
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+
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+&pwm3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
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+ status = "disabled";
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+};
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+
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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@@ -242,6 +254,18 @@
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>;
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};
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+ pinctrl_pwm2: pwm2grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
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+ >;
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+ };
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+
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+ pinctrl_pwm3: pwm3grp {
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+ fsl,pins = <
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+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
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+ >;
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+ };
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+
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
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