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88a404a2d1
Add a new microchipsw target aimed add supporting Microchip switch SoC-s. Start by supporting LAN969x SoC-s as the first subtarget. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
61 lines
2.1 KiB
Diff
61 lines
2.1 KiB
Diff
From efdc2c3094cc2e8aca09c3a16f7a0f3a10d9a097 Mon Sep 17 00:00:00 2001
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From: Daniel Machon <daniel.machon@microchip.com>
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Date: Fri, 4 Oct 2024 15:19:33 +0200
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Subject: [PATCH 35/82] net: sparx5: use SPX5_CONST for constants which do not
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have a symbol
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Now that we have indentified all the chip constants, update the use of
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them where a symbol is not defined for the constant.
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Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
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Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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drivers/net/ethernet/microchip/sparx5/sparx5_main.c | 13 +++++++++----
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1 file changed, 9 insertions(+), 4 deletions(-)
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--- a/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
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+++ b/drivers/net/ethernet/microchip/sparx5/sparx5_main.c
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@@ -522,7 +522,7 @@ static int sparx5_init_coreclock(struct
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sparx5,
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LRN_AUTOAGE_CFG_1);
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- for (idx = 0; idx < 3; idx++)
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+ for (idx = 0; idx < sparx5->data->consts->n_sio_clks; idx++)
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spx5_rmw(GCB_SIO_CLOCK_SYS_CLK_PERIOD_SET(clk_period / 100),
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GCB_SIO_CLOCK_SYS_CLK_PERIOD,
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sparx5,
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@@ -550,16 +550,21 @@ static u32 qlim_wm(struct sparx5 *sparx5
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static int sparx5_qlim_set(struct sparx5 *sparx5)
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{
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+ const struct sparx5_consts *consts = sparx5->data->consts;
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u32 res, dp, prio;
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for (res = 0; res < 2; res++) {
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for (prio = 0; prio < 8; prio++)
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spx5_wr(0xFFF, sparx5,
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- QRES_RES_CFG(prio + 630 + res * 1024));
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+ QRES_RES_CFG(prio +
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+ consts->qres_max_prio_idx +
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+ res * 1024));
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for (dp = 0; dp < 4; dp++)
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spx5_wr(0xFFF, sparx5,
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- QRES_RES_CFG(dp + 638 + res * 1024));
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+ QRES_RES_CFG(dp +
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+ consts->qres_max_colour_idx +
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+ res * 1024));
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}
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/* Set 80,90,95,100% of memory size for top watermarks */
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@@ -605,7 +610,7 @@ static int sparx5_start(struct sparx5 *s
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int err;
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/* Setup own UPSIDs */
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- for (idx = 0; idx < 3; idx++) {
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+ for (idx = 0; idx < consts->n_own_upsids; idx++) {
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spx5_wr(idx, sparx5, ANA_AC_OWN_UPSID(idx));
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spx5_wr(idx, sparx5, ANA_CL_OWN_UPSID(idx));
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spx5_wr(idx, sparx5, ANA_L2_OWN_UPSID(idx));
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