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88a404a2d1
Add a new microchipsw target aimed add supporting Microchip switch SoC-s. Start by supporting LAN969x SoC-s as the first subtarget. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
27 lines
923 B
Diff
27 lines
923 B
Diff
From 60b15ad144394ef5da427160fd947af93affef72 Mon Sep 17 00:00:00 2001
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From: Daniel Machon <daniel.machon@microchip.com>
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Date: Mon, 16 Sep 2024 11:49:20 +0200
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Subject: [PATCH 04/25] clk: lan966x: make clk_names const char * const
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Change clk_names to const char * const to silence checkpatch in
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subsequent patches.
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Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
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Link: https://lore.kernel.org/r/20240916-lan969x-clock-v1-2-0e150336074d@microchip.com
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Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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---
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drivers/clk/clk-lan966x.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/clk/clk-lan966x.c
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+++ b/drivers/clk/clk-lan966x.c
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@@ -24,7 +24,7 @@
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#define DIV_MAX 255
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-static const char *clk_names[N_CLOCKS] = {
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+static const char * const clk_names[N_CLOCKS] = {
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"qspi0", "qspi1", "qspi2", "sdmmc0",
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"pi", "mcan0", "mcan1", "flexcom0",
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"flexcom1", "flexcom2", "flexcom3",
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