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			643 lines
		
	
	
		
			19 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			643 lines
		
	
	
		
			19 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
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Date: Thu, 21 Jul 2016 11:50:00 +0530
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Subject: [PATCH] ath10k: implement NAPI support
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Add NAPI support for rx and tx completion. NAPI poll is scheduled
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from interrupt handler. The design is as below
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 - on interrupt
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     - schedule napi and mask interrupts
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 - on poll
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   - process all pipes (no actual Tx/Rx)
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   - process Rx within budget
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   - if quota exceeds budget reschedule napi poll by returning budget
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   - process Tx completions and update budget if necessary
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   - process Tx fetch indications (pull-push)
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   - push any other pending Tx (if possible)
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   - before resched or napi completion replenish htt rx ring buffer
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   - if work done < budget, complete napi poll and unmask interrupts
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This change also get rid of two tasklets (intr_tq and txrx_compl_task).
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Measured peak throughput with NAPI on IPQ4019 platform in controlled
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environment. No noticeable reduction in throughput is seen and also
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observed improvements in CPU usage. Approx. 15% CPU usage got reduced
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in UDP uplink case.
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DL: AP DUT Tx
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UL: AP DUT Rx
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IPQ4019 (avg. cpu usage %)
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========
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                TOT              +NAPI
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              ===========      =============
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TCP DL       644 Mbps (42%)    645 Mbps (36%)
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TCP UL       673 Mbps (30%)    675 Mbps (26%)
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UDP DL       682 Mbps (49%)    680 Mbps (49%)
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UDP UL       720 Mbps (28%)    717 Mbps (11%)
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Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
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---
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--- a/drivers/net/wireless/ath/ath10k/ahb.c
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+++ b/drivers/net/wireless/ath/ath10k/ahb.c
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@@ -462,13 +462,13 @@ static void ath10k_ahb_halt_chip(struct
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 static irqreturn_t ath10k_ahb_interrupt_handler(int irq, void *arg)
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 {
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 	struct ath10k *ar = arg;
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-	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
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 	if (!ath10k_pci_irq_pending(ar))
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 		return IRQ_NONE;
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 	ath10k_pci_disable_and_clear_legacy_irq(ar);
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-	tasklet_schedule(&ar_pci->intr_tq);
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+	ath10k_pci_irq_msi_fw_mask(ar);
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+	napi_schedule(&ar->napi);
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 	return IRQ_HANDLED;
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 }
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@@ -831,7 +831,7 @@ static int ath10k_ahb_probe(struct platf
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 		goto err_resource_deinit;
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 	}
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-	ath10k_pci_init_irq_tasklets(ar);
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+	ath10k_pci_init_napi(ar);
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 	ret = ath10k_ahb_request_irq_legacy(ar);
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 	if (ret)
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--- a/drivers/net/wireless/ath/ath10k/core.c
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+++ b/drivers/net/wireless/ath/ath10k/core.c
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@@ -2226,6 +2226,8 @@ struct ath10k *ath10k_core_create(size_t
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 	INIT_WORK(&ar->register_work, ath10k_core_register_work);
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 	INIT_WORK(&ar->restart_work, ath10k_core_restart);
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+	init_dummy_netdev(&ar->napi_dev);
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+
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 	ret = ath10k_debug_create(ar);
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 	if (ret)
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 		goto err_free_aux_wq;
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--- a/drivers/net/wireless/ath/ath10k/core.h
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+++ b/drivers/net/wireless/ath/ath10k/core.h
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@@ -65,6 +65,10 @@
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 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
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 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
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+/* NAPI poll budget */
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+#define ATH10K_NAPI_BUDGET      64
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+#define ATH10K_NAPI_QUOTA_LIMIT 60
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+
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 struct ath10k;
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 enum ath10k_bus {
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@@ -933,6 +937,10 @@ struct ath10k {
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 	struct ath10k_thermal thermal;
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 	struct ath10k_wow wow;
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+	/* NAPI */
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+	struct net_device napi_dev;
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+	struct napi_struct napi;
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+
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 	/* must be last */
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 	u8 drv_priv[0] __aligned(sizeof(void *));
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 };
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--- a/drivers/net/wireless/ath/ath10k/htt.h
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+++ b/drivers/net/wireless/ath/ath10k/htt.h
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@@ -1666,7 +1666,6 @@ struct ath10k_htt {
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 	/* This is used to group tx/rx completions separately and process them
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 	 * in batches to reduce cache stalls */
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-	struct tasklet_struct txrx_compl_task;
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 	struct sk_buff_head rx_compl_q;
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 	struct sk_buff_head rx_in_ord_compl_q;
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 	struct sk_buff_head tx_fetch_ind_q;
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@@ -1799,5 +1798,6 @@ int ath10k_htt_tx(struct ath10k_htt *htt
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 		  struct sk_buff *msdu);
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 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
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 					     struct sk_buff *skb);
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+int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget);
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 #endif
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--- a/drivers/net/wireless/ath/ath10k/htt_rx.c
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+++ b/drivers/net/wireless/ath/ath10k/htt_rx.c
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@@ -34,7 +34,6 @@
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 #define HTT_RX_RING_REFILL_RESCHED_MS 5
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 static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
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-static void ath10k_htt_txrx_compl_task(unsigned long ptr);
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 static struct sk_buff *
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 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
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@@ -226,7 +225,6 @@ int ath10k_htt_rx_ring_refill(struct ath
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 void ath10k_htt_rx_free(struct ath10k_htt *htt)
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 {
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 	del_timer_sync(&htt->rx_ring.refill_retry_timer);
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-	tasklet_kill(&htt->txrx_compl_task);
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 	skb_queue_purge(&htt->rx_compl_q);
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 	skb_queue_purge(&htt->rx_in_ord_compl_q);
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@@ -520,9 +518,6 @@ int ath10k_htt_rx_alloc(struct ath10k_ht
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 	skb_queue_head_init(&htt->tx_fetch_ind_q);
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 	atomic_set(&htt->num_mpdus_ready, 0);
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-	tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
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-		     (unsigned long)htt);
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-
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 	ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
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 		   htt->rx_ring.size, htt->rx_ring.fill_level);
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 	return 0;
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@@ -958,7 +953,7 @@ static void ath10k_process_rx(struct ath
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 	trace_ath10k_rx_hdr(ar, skb->data, skb->len);
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 	trace_ath10k_rx_payload(ar, skb->data, skb->len);
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-	ieee80211_rx(ar->hw, skb);
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+	ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi);
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 }
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 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
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@@ -1527,7 +1522,7 @@ static int ath10k_htt_rx_handle_amsdu(st
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 	struct ath10k *ar = htt->ar;
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 	struct ieee80211_rx_status *rx_status = &htt->rx_status;
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 	struct sk_buff_head amsdu;
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-	int ret;
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+	int ret, num_msdus;
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 	__skb_queue_head_init(&amsdu);
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@@ -1549,13 +1544,14 @@ static int ath10k_htt_rx_handle_amsdu(st
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 		return ret;
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 	}
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+	num_msdus = skb_queue_len(&amsdu);
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 	ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
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 	ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
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 	ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
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 	ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
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 	ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
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-	return 0;
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+	return num_msdus;
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 }
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 static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt,
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@@ -1579,15 +1575,6 @@ static void ath10k_htt_rx_proc_rx_ind(st
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 		mpdu_count += mpdu_ranges[i].mpdu_count;
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 	atomic_add(mpdu_count, &htt->num_mpdus_ready);
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-
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-	tasklet_schedule(&htt->txrx_compl_task);
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-}
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-
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-static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt)
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-{
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-	atomic_inc(&htt->num_mpdus_ready);
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-
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-	tasklet_schedule(&htt->txrx_compl_task);
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 }
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 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
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@@ -1772,14 +1759,15 @@ static void ath10k_htt_rx_h_rx_offload_p
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 			RX_FLAG_MMIC_STRIPPED;
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 }
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-static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
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-				       struct sk_buff_head *list)
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+static int ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
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+				      struct sk_buff_head *list)
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 {
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 	struct ath10k_htt *htt = &ar->htt;
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 	struct ieee80211_rx_status *status = &htt->rx_status;
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 	struct htt_rx_offload_msdu *rx;
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 	struct sk_buff *msdu;
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 	size_t offset;
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+	int num_msdu = 0;
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 	while ((msdu = __skb_dequeue(list))) {
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 		/* Offloaded frames don't have Rx descriptor. Instead they have
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@@ -1819,10 +1807,12 @@ static void ath10k_htt_rx_h_rx_offload(s
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 		ath10k_htt_rx_h_rx_offload_prot(status, msdu);
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 		ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
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 		ath10k_process_rx(ar, status, msdu);
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+		num_msdu++;
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 	}
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+	return num_msdu;
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 }
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-static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
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+static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
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 {
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 	struct ath10k_htt *htt = &ar->htt;
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 	struct htt_resp *resp = (void *)skb->data;
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@@ -1835,12 +1825,12 @@ static void ath10k_htt_rx_in_ord_ind(str
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 	u8 tid;
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 	bool offload;
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 	bool frag;
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-	int ret;
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+	int ret, num_msdus = 0;
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 	lockdep_assert_held(&htt->rx_ring.lock);
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 	if (htt->rx_confused)
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-		return;
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+		return -EIO;
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 	skb_pull(skb, sizeof(resp->hdr));
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 	skb_pull(skb, sizeof(resp->rx_in_ord_ind));
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@@ -1859,7 +1849,7 @@ static void ath10k_htt_rx_in_ord_ind(str
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 	if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
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 		ath10k_warn(ar, "dropping invalid in order rx indication\n");
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-		return;
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+		return -EINVAL;
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 	}
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 	/* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
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@@ -1870,14 +1860,14 @@ static void ath10k_htt_rx_in_ord_ind(str
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 	if (ret < 0) {
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 		ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
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 		htt->rx_confused = true;
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-		return;
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+		return -EIO;
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 	}
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 	/* Offloaded frames are very different and need to be handled
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 	 * separately.
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 	 */
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 	if (offload)
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-		ath10k_htt_rx_h_rx_offload(ar, &list);
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+		num_msdus = ath10k_htt_rx_h_rx_offload(ar, &list);
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 	while (!skb_queue_empty(&list)) {
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 		__skb_queue_head_init(&amsdu);
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@@ -1890,6 +1880,7 @@ static void ath10k_htt_rx_in_ord_ind(str
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 			 * better to report something than nothing though. This
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 			 * should still give an idea about rx rate to the user.
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 			 */
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+			num_msdus += skb_queue_len(&amsdu);
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 			ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
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 			ath10k_htt_rx_h_filter(ar, &amsdu, status);
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 			ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
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@@ -1902,9 +1893,10 @@ static void ath10k_htt_rx_in_ord_ind(str
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 			ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
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 			htt->rx_confused = true;
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 			__skb_queue_purge(&list);
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-			return;
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+			return -EIO;
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 		}
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 	}
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+	return num_msdus;
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 }
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 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
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@@ -2267,7 +2259,6 @@ bool ath10k_htt_t2h_msg_handler(struct a
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 	}
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 	case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
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 		ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
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-		tasklet_schedule(&htt->txrx_compl_task);
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 		break;
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 	case HTT_T2H_MSG_TYPE_SEC_IND: {
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 		struct ath10k *ar = htt->ar;
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@@ -2284,7 +2275,7 @@ bool ath10k_htt_t2h_msg_handler(struct a
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 	case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
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 		ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
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 				skb->data, skb->len);
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-		ath10k_htt_rx_frag_handler(htt);
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+		atomic_inc(&htt->num_mpdus_ready);
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 		break;
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 	}
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 	case HTT_T2H_MSG_TYPE_TEST:
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@@ -2322,8 +2313,7 @@ bool ath10k_htt_t2h_msg_handler(struct a
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 		break;
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 	}
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 	case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
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-		skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
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-		tasklet_schedule(&htt->txrx_compl_task);
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+		__skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
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 		return false;
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 	}
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 	case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
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@@ -2349,7 +2339,6 @@ bool ath10k_htt_t2h_msg_handler(struct a
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 			break;
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 		}
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 		skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
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-		tasklet_schedule(&htt->txrx_compl_task);
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 		break;
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 	}
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 	case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
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@@ -2378,27 +2367,77 @@ void ath10k_htt_rx_pktlog_completion_han
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 }
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 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
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 | 
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-static void ath10k_htt_txrx_compl_task(unsigned long ptr)
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+int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget)
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 {
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-	struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
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-	struct ath10k *ar = htt->ar;
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+	struct ath10k_htt *htt = &ar->htt;
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 	struct htt_tx_done tx_done = {};
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-	struct sk_buff_head rx_ind_q;
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 	struct sk_buff_head tx_ind_q;
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 	struct sk_buff *skb;
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 	unsigned long flags;
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-	int num_mpdus;
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+	int quota = 0, done, num_rx_msdus;
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+	bool resched_napi = false;
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-	__skb_queue_head_init(&rx_ind_q);
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 	__skb_queue_head_init(&tx_ind_q);
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						|
 
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-	spin_lock_irqsave(&htt->rx_in_ord_compl_q.lock, flags);
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-	skb_queue_splice_init(&htt->rx_in_ord_compl_q, &rx_ind_q);
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-	spin_unlock_irqrestore(&htt->rx_in_ord_compl_q.lock, flags);
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						|
+	/* Since in-ord-ind can deliver more than 1 A-MSDU in single event,
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+	 * process it first to utilize full available quota.
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						|
+	 */
 | 
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+	while (quota < budget) {
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+		if (skb_queue_empty(&htt->rx_in_ord_compl_q))
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						|
+			break;
 | 
						|
 
 | 
						|
-	spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
 | 
						|
-	skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
 | 
						|
-	spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
 | 
						|
+		skb = __skb_dequeue(&htt->rx_in_ord_compl_q);
 | 
						|
+		if (!skb) {
 | 
						|
+			resched_napi = true;
 | 
						|
+			goto exit;
 | 
						|
+		}
 | 
						|
+
 | 
						|
+		spin_lock_bh(&htt->rx_ring.lock);
 | 
						|
+		num_rx_msdus = ath10k_htt_rx_in_ord_ind(ar, skb);
 | 
						|
+		spin_unlock_bh(&htt->rx_ring.lock);
 | 
						|
+		if (num_rx_msdus < 0) {
 | 
						|
+			resched_napi = true;
 | 
						|
+			goto exit;
 | 
						|
+		}
 | 
						|
+
 | 
						|
+		dev_kfree_skb_any(skb);
 | 
						|
+		if (num_rx_msdus > 0)
 | 
						|
+			quota += num_rx_msdus;
 | 
						|
+
 | 
						|
+		if ((quota > ATH10K_NAPI_QUOTA_LIMIT) &&
 | 
						|
+		    !skb_queue_empty(&htt->rx_in_ord_compl_q)) {
 | 
						|
+			resched_napi = true;
 | 
						|
+			goto exit;
 | 
						|
+		}
 | 
						|
+	}
 | 
						|
+
 | 
						|
+	while (quota < budget) {
 | 
						|
+		/* no more data to receive */
 | 
						|
+		if (!atomic_read(&htt->num_mpdus_ready))
 | 
						|
+			break;
 | 
						|
+
 | 
						|
+		num_rx_msdus = ath10k_htt_rx_handle_amsdu(htt);
 | 
						|
+		if (num_rx_msdus < 0) {
 | 
						|
+			resched_napi = true;
 | 
						|
+			goto exit;
 | 
						|
+		}
 | 
						|
+
 | 
						|
+		quota += num_rx_msdus;
 | 
						|
+		atomic_dec(&htt->num_mpdus_ready);
 | 
						|
+		if ((quota > ATH10K_NAPI_QUOTA_LIMIT) &&
 | 
						|
+		    atomic_read(&htt->num_mpdus_ready)) {
 | 
						|
+			resched_napi = true;
 | 
						|
+			goto exit;
 | 
						|
+		}
 | 
						|
+	}
 | 
						|
+
 | 
						|
+	/* From NAPI documentation:
 | 
						|
+	 *  The napi poll() function may also process TX completions, in which
 | 
						|
+	 *  case if it processes the entire TX ring then it should count that
 | 
						|
+	 *  work as the rest of the budget.
 | 
						|
+	 */
 | 
						|
+	if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo))
 | 
						|
+		quota = budget;
 | 
						|
 
 | 
						|
 	/* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
 | 
						|
 	 * From kfifo_get() documentation:
 | 
						|
@@ -2408,27 +2447,22 @@ static void ath10k_htt_txrx_compl_task(u
 | 
						|
 	while (kfifo_get(&htt->txdone_fifo, &tx_done))
 | 
						|
 		ath10k_txrx_tx_unref(htt, &tx_done);
 | 
						|
 
 | 
						|
+	spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
 | 
						|
+	skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
 | 
						|
+	spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
 | 
						|
+
 | 
						|
 	while ((skb = __skb_dequeue(&tx_ind_q))) {
 | 
						|
 		ath10k_htt_rx_tx_fetch_ind(ar, skb);
 | 
						|
 		dev_kfree_skb_any(skb);
 | 
						|
 	}
 | 
						|
 
 | 
						|
-	num_mpdus = atomic_read(&htt->num_mpdus_ready);
 | 
						|
-
 | 
						|
-	while (num_mpdus) {
 | 
						|
-		if (ath10k_htt_rx_handle_amsdu(htt))
 | 
						|
-			break;
 | 
						|
-
 | 
						|
-		num_mpdus--;
 | 
						|
-		atomic_dec(&htt->num_mpdus_ready);
 | 
						|
-	}
 | 
						|
-
 | 
						|
-	while ((skb = __skb_dequeue(&rx_ind_q))) {
 | 
						|
-		spin_lock_bh(&htt->rx_ring.lock);
 | 
						|
-		ath10k_htt_rx_in_ord_ind(ar, skb);
 | 
						|
-		spin_unlock_bh(&htt->rx_ring.lock);
 | 
						|
-		dev_kfree_skb_any(skb);
 | 
						|
-	}
 | 
						|
-
 | 
						|
+exit:
 | 
						|
 	ath10k_htt_rx_msdu_buff_replenish(htt);
 | 
						|
+	/* In case of rx failure or more data to read, report budget
 | 
						|
+	 * to reschedule NAPI poll
 | 
						|
+	 */
 | 
						|
+	done = resched_napi ? budget : quota;
 | 
						|
+
 | 
						|
+	return done;
 | 
						|
 }
 | 
						|
+EXPORT_SYMBOL(ath10k_htt_txrx_compl_task);
 | 
						|
--- a/drivers/net/wireless/ath/ath10k/htt_tx.c
 | 
						|
+++ b/drivers/net/wireless/ath/ath10k/htt_tx.c
 | 
						|
@@ -388,8 +388,6 @@ void ath10k_htt_tx_free(struct ath10k_ht
 | 
						|
 {
 | 
						|
 	int size;
 | 
						|
 
 | 
						|
-	tasklet_kill(&htt->txrx_compl_task);
 | 
						|
-
 | 
						|
 	idr_for_each(&htt->pending_tx, ath10k_htt_tx_clean_up_pending, htt->ar);
 | 
						|
 	idr_destroy(&htt->pending_tx);
 | 
						|
 
 | 
						|
--- a/drivers/net/wireless/ath/ath10k/pci.c
 | 
						|
+++ b/drivers/net/wireless/ath/ath10k/pci.c
 | 
						|
@@ -1502,12 +1502,10 @@ void ath10k_pci_hif_send_complete_check(
 | 
						|
 	ath10k_ce_per_engine_service(ar, pipe);
 | 
						|
 }
 | 
						|
 
 | 
						|
-void ath10k_pci_kill_tasklet(struct ath10k *ar)
 | 
						|
+static void ath10k_pci_rx_retry_sync(struct ath10k *ar)
 | 
						|
 {
 | 
						|
 	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
 | 
						|
 
 | 
						|
-	tasklet_kill(&ar_pci->intr_tq);
 | 
						|
-
 | 
						|
 	del_timer_sync(&ar_pci->rx_post_retry);
 | 
						|
 }
 | 
						|
 
 | 
						|
@@ -1566,7 +1564,7 @@ void ath10k_pci_hif_get_default_pipe(str
 | 
						|
 						 ul_pipe, dl_pipe);
 | 
						|
 }
 | 
						|
 
 | 
						|
-static void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar)
 | 
						|
+void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar)
 | 
						|
 {
 | 
						|
 	u32 val;
 | 
						|
 
 | 
						|
@@ -1747,7 +1745,7 @@ void ath10k_pci_ce_deinit(struct ath10k
 | 
						|
 
 | 
						|
 void ath10k_pci_flush(struct ath10k *ar)
 | 
						|
 {
 | 
						|
-	ath10k_pci_kill_tasklet(ar);
 | 
						|
+	ath10k_pci_rx_retry_sync(ar);
 | 
						|
 	ath10k_pci_buffer_cleanup(ar);
 | 
						|
 }
 | 
						|
 
 | 
						|
@@ -2754,35 +2752,53 @@ static irqreturn_t ath10k_pci_interrupt_
 | 
						|
 		return IRQ_NONE;
 | 
						|
 	}
 | 
						|
 
 | 
						|
-	if (ar_pci->oper_irq_mode == ATH10K_PCI_IRQ_LEGACY) {
 | 
						|
-		if (!ath10k_pci_irq_pending(ar))
 | 
						|
-			return IRQ_NONE;
 | 
						|
-
 | 
						|
-		ath10k_pci_disable_and_clear_legacy_irq(ar);
 | 
						|
-	}
 | 
						|
+	if ((ar_pci->oper_irq_mode == ATH10K_PCI_IRQ_LEGACY) &&
 | 
						|
+	    !ath10k_pci_irq_pending(ar))
 | 
						|
+		return IRQ_NONE;
 | 
						|
 
 | 
						|
-	tasklet_schedule(&ar_pci->intr_tq);
 | 
						|
+	ath10k_pci_disable_and_clear_legacy_irq(ar);
 | 
						|
+	ath10k_pci_irq_msi_fw_mask(ar);
 | 
						|
+	napi_schedule(&ar->napi);
 | 
						|
 
 | 
						|
 	return IRQ_HANDLED;
 | 
						|
 }
 | 
						|
 
 | 
						|
-static void ath10k_pci_tasklet(unsigned long data)
 | 
						|
+static int ath10k_pci_napi_poll(struct napi_struct *ctx, int budget)
 | 
						|
 {
 | 
						|
-	struct ath10k *ar = (struct ath10k *)data;
 | 
						|
-	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
 | 
						|
+	struct ath10k *ar = container_of(ctx, struct ath10k, napi);
 | 
						|
+	int done = 0;
 | 
						|
 
 | 
						|
 	if (ath10k_pci_has_fw_crashed(ar)) {
 | 
						|
-		ath10k_pci_irq_disable(ar);
 | 
						|
 		ath10k_pci_fw_crashed_clear(ar);
 | 
						|
 		ath10k_pci_fw_crashed_dump(ar);
 | 
						|
-		return;
 | 
						|
+		napi_complete(ctx);
 | 
						|
+		return done;
 | 
						|
 	}
 | 
						|
 
 | 
						|
 	ath10k_ce_per_engine_service_any(ar);
 | 
						|
 
 | 
						|
-	/* Re-enable legacy irq that was disabled in the irq handler */
 | 
						|
-	if (ar_pci->oper_irq_mode == ATH10K_PCI_IRQ_LEGACY)
 | 
						|
+	done = ath10k_htt_txrx_compl_task(ar, budget);
 | 
						|
+
 | 
						|
+	if (done < budget) {
 | 
						|
+		napi_complete(ctx);
 | 
						|
+		/* In case of MSI, it is possible that interrupts are received
 | 
						|
+		 * while NAPI poll is inprogress. So pending interrupts that are
 | 
						|
+		 * received after processing all copy engine pipes by NAPI poll
 | 
						|
+		 * will not be handled again. This is causing failure to
 | 
						|
+		 * complete boot sequence in x86 platform. So before enabling
 | 
						|
+		 * interrupts safer to check for pending interrupts for
 | 
						|
+		 * immediate servicing.
 | 
						|
+		 */
 | 
						|
+		if (CE_INTERRUPT_SUMMARY(ar)) {
 | 
						|
+			napi_reschedule(&ar->napi);
 | 
						|
+			goto out;
 | 
						|
+		}
 | 
						|
 		ath10k_pci_enable_legacy_irq(ar);
 | 
						|
+		ath10k_pci_irq_msi_fw_unmask(ar);
 | 
						|
+	}
 | 
						|
+
 | 
						|
+out:
 | 
						|
+	return done;
 | 
						|
 }
 | 
						|
 
 | 
						|
 static int ath10k_pci_request_irq_msi(struct ath10k *ar)
 | 
						|
@@ -2840,11 +2856,11 @@ static void ath10k_pci_free_irq(struct a
 | 
						|
 	free_irq(ar_pci->pdev->irq, ar);
 | 
						|
 }
 | 
						|
 
 | 
						|
-void ath10k_pci_init_irq_tasklets(struct ath10k *ar)
 | 
						|
+void ath10k_pci_init_napi(struct ath10k *ar)
 | 
						|
 {
 | 
						|
-	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
 | 
						|
-
 | 
						|
-	tasklet_init(&ar_pci->intr_tq, ath10k_pci_tasklet, (unsigned long)ar);
 | 
						|
+	netif_napi_add(&ar->napi_dev, &ar->napi, ath10k_pci_napi_poll,
 | 
						|
+		       ATH10K_NAPI_BUDGET);
 | 
						|
+	napi_enable(&ar->napi);
 | 
						|
 }
 | 
						|
 
 | 
						|
 static int ath10k_pci_init_irq(struct ath10k *ar)
 | 
						|
@@ -2852,7 +2868,7 @@ static int ath10k_pci_init_irq(struct at
 | 
						|
 	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
 | 
						|
 	int ret;
 | 
						|
 
 | 
						|
-	ath10k_pci_init_irq_tasklets(ar);
 | 
						|
+	ath10k_pci_init_napi(ar);
 | 
						|
 
 | 
						|
 	if (ath10k_pci_irq_mode != ATH10K_PCI_IRQ_AUTO)
 | 
						|
 		ath10k_info(ar, "limiting irq mode to: %d\n",
 | 
						|
@@ -3113,7 +3129,8 @@ int ath10k_pci_setup_resource(struct ath
 | 
						|
 
 | 
						|
 void ath10k_pci_release_resource(struct ath10k *ar)
 | 
						|
 {
 | 
						|
-	ath10k_pci_kill_tasklet(ar);
 | 
						|
+	ath10k_pci_rx_retry_sync(ar);
 | 
						|
+	netif_napi_del(&ar->napi);
 | 
						|
 	ath10k_pci_ce_deinit(ar);
 | 
						|
 	ath10k_pci_free_pipes(ar);
 | 
						|
 }
 | 
						|
@@ -3274,7 +3291,7 @@ static int ath10k_pci_probe(struct pci_d
 | 
						|
 
 | 
						|
 err_free_irq:
 | 
						|
 	ath10k_pci_free_irq(ar);
 | 
						|
-	ath10k_pci_kill_tasklet(ar);
 | 
						|
+	ath10k_pci_rx_retry_sync(ar);
 | 
						|
 
 | 
						|
 err_deinit_irq:
 | 
						|
 	ath10k_pci_deinit_irq(ar);
 | 
						|
--- a/drivers/net/wireless/ath/ath10k/pci.h
 | 
						|
+++ b/drivers/net/wireless/ath/ath10k/pci.h
 | 
						|
@@ -177,8 +177,6 @@ struct ath10k_pci {
 | 
						|
 	/* Operating interrupt mode */
 | 
						|
 	enum ath10k_pci_irq_mode oper_irq_mode;
 | 
						|
 
 | 
						|
-	struct tasklet_struct intr_tq;
 | 
						|
-
 | 
						|
 	struct ath10k_pci_pipe pipe_info[CE_COUNT_MAX];
 | 
						|
 
 | 
						|
 	/* Copy Engine used for Diagnostic Accesses */
 | 
						|
@@ -294,8 +292,7 @@ void ath10k_pci_free_pipes(struct ath10k
 | 
						|
 void ath10k_pci_free_pipes(struct ath10k *ar);
 | 
						|
 void ath10k_pci_rx_replenish_retry(unsigned long ptr);
 | 
						|
 void ath10k_pci_ce_deinit(struct ath10k *ar);
 | 
						|
-void ath10k_pci_init_irq_tasklets(struct ath10k *ar);
 | 
						|
-void ath10k_pci_kill_tasklet(struct ath10k *ar);
 | 
						|
+void ath10k_pci_init_napi(struct ath10k *ar);
 | 
						|
 int ath10k_pci_init_pipes(struct ath10k *ar);
 | 
						|
 int ath10k_pci_init_config(struct ath10k *ar);
 | 
						|
 void ath10k_pci_rx_post(struct ath10k *ar);
 | 
						|
@@ -303,6 +300,7 @@ void ath10k_pci_flush(struct ath10k *ar)
 | 
						|
 void ath10k_pci_enable_legacy_irq(struct ath10k *ar);
 | 
						|
 bool ath10k_pci_irq_pending(struct ath10k *ar);
 | 
						|
 void ath10k_pci_disable_and_clear_legacy_irq(struct ath10k *ar);
 | 
						|
+void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar);
 | 
						|
 int ath10k_pci_wait_for_target_init(struct ath10k *ar);
 | 
						|
 int ath10k_pci_setup_resource(struct ath10k *ar);
 | 
						|
 void ath10k_pci_release_resource(struct ath10k *ar);
 |