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			141 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			141 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  TP-LINK TL-WR841N/ND v1 board support
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|  *
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|  *  Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
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|  *
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|  *  This program is free software; you can redistribute it and/or modify it
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|  *  under the terms of the GNU General Public License version 2 as published
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|  *  by the Free Software Foundation.
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|  */
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| 
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| #include <linux/mtd/mtd.h>
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| #include <linux/mtd/partitions.h>
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| #include <linux/platform_device.h>
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| 
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| #include <asm/mach-ath79/ath79.h>
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| 
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| #include "dev-dsa.h"
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| #include "dev-eth.h"
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| #include "dev-gpio-buttons.h"
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| #include "dev-leds-gpio.h"
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| #include "dev-m25p80.h"
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| #include "machtypes.h"
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| #include "pci.h"
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| 
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| #define TL_WR841ND_V1_GPIO_LED_SYSTEM		2
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| #define TL_WR841ND_V1_GPIO_LED_QSS_GREEN	4
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| #define TL_WR841ND_V1_GPIO_LED_QSS_RED		5
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| 
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| #define TL_WR841ND_V1_GPIO_BTN_RESET		3
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| #define TL_WR841ND_V1_GPIO_BTN_QSS		7
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| 
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| #define TL_WR841ND_V1_KEYS_POLL_INTERVAL	20	/* msecs */
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| #define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \
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| 				(3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL)
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| 
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| static struct mtd_partition tl_wr841n_v1_partitions[] = {
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| 	{
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| 		.name		= "redboot",
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| 		.offset		= 0,
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| 		.size		= 0x020000,
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| 		.mask_flags	= MTD_WRITEABLE,
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| 	}, {
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| 		.name		= "kernel",
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| 		.offset		= 0x020000,
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| 		.size		= 0x140000,
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| 	}, {
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| 		.name		= "rootfs",
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| 		.offset		= 0x160000,
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| 		.size		= 0x280000,
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| 	}, {
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| 		.name		= "config",
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| 		.offset		= 0x3e0000,
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| 		.size		= 0x020000,
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| 		.mask_flags	= MTD_WRITEABLE,
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| 	}, {
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| 		.name		= "firmware",
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| 		.offset		= 0x020000,
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| 		.size		= 0x3c0000,
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| 	}
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| };
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| 
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| static struct flash_platform_data tl_wr841n_v1_flash_data = {
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| 	.parts		= tl_wr841n_v1_partitions,
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| 	.nr_parts	= ARRAY_SIZE(tl_wr841n_v1_partitions),
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| };
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| 
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| static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = {
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| 	{
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| 		.name		= "tp-link:green:system",
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| 		.gpio		= TL_WR841ND_V1_GPIO_LED_SYSTEM,
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| 		.active_low	= 1,
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| 	}, {
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| 		.name		= "tp-link:red:qss",
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| 		.gpio		= TL_WR841ND_V1_GPIO_LED_QSS_RED,
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| 	}, {
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| 		.name		= "tp-link:green:qss",
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| 		.gpio		= TL_WR841ND_V1_GPIO_LED_QSS_GREEN,
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| 	}
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| };
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| 
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| static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = {
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| 	{
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| 		.desc		= "reset",
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| 		.type		= EV_KEY,
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| 		.code		= KEY_RESTART,
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| 		.debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL,
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| 		.gpio		= TL_WR841ND_V1_GPIO_BTN_RESET,
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| 		.active_low	= 1,
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| 	}, {
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| 		.desc		= "qss",
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| 		.type		= EV_KEY,
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| 		.code		= KEY_WPS_BUTTON,
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| 		.debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL,
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| 		.gpio		= TL_WR841ND_V1_GPIO_BTN_QSS,
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| 		.active_low	= 1,
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| 	}
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| };
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| 
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| static struct dsa_chip_data tl_wr841n_v1_dsa_chip = {
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| 	.port_names[0]  = "wan",
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| 	.port_names[1]  = "lan1",
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| 	.port_names[2]  = "lan2",
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| 	.port_names[3]  = "lan3",
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| 	.port_names[4]  = "lan4",
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| 	.port_names[5]  = "cpu",
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| };
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| 
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| static struct dsa_platform_data tl_wr841n_v1_dsa_data = {
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| 	.nr_chips	= 1,
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| 	.chip		= &tl_wr841n_v1_dsa_chip,
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| };
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| 
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| static void __init tl_wr841n_v1_setup(void)
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| {
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| 	u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
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| 
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| 	ath79_register_mdio(0, 0x0);
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| 
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| 	ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
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| 	ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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| 	ath79_eth0_data.speed = SPEED_100;
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| 	ath79_eth0_data.duplex = DUPLEX_FULL;
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| 
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| 	ath79_register_eth(0);
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| 	ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev,
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| 			   &tl_wr841n_v1_dsa_data);
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| 
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| 	ath79_register_m25p80(&tl_wr841n_v1_flash_data);
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| 
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| 	ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio),
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| 				 tl_wr841n_v1_leds_gpio);
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| 
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| 	ath79_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL,
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| 					ARRAY_SIZE(tl_wr841n_v1_gpio_keys),
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| 					tl_wr841n_v1_gpio_keys);
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| 	ath79_register_pci();
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| }
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| 
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| MIPS_MACHINE(ATH79_MACH_TL_WR841N_V1, "TL-WR841N-v1.5", "TP-LINK TL-WR841N v1",
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| 	     tl_wr841n_v1_setup);
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