mirror of
git://git.openwrt.org/openwrt/openwrt.git
synced 2025-10-31 05:54:26 -04:00
66f8f30f47
Update patches with their upstream versions. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37098
74 lines
2.6 KiB
Diff
74 lines
2.6 KiB
Diff
From b6b668f780d62d41bc14bc7baba1692e17cabf84 Mon Sep 17 00:00:00 2001
|
|
From: Jonas Gorski <jogo@openwrt.org>
|
|
Date: Fri, 26 Apr 2013 11:21:16 +0200
|
|
Subject: [PATCH 10/14] MIPS: BCM63XX: add cpu argument to dispatch internal
|
|
|
|
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
|
---
|
|
arch/mips/bcm63xx/irq.c | 21 +++++++++++----------
|
|
1 file changed, 11 insertions(+), 10 deletions(-)
|
|
|
|
--- a/arch/mips/bcm63xx/irq.c
|
|
+++ b/arch/mips/bcm63xx/irq.c
|
|
@@ -19,8 +19,8 @@
|
|
#include <bcm63xx_io.h>
|
|
#include <bcm63xx_irq.h>
|
|
|
|
-static void __dispatch_internal_32(void) __maybe_unused;
|
|
-static void __dispatch_internal_64(void) __maybe_unused;
|
|
+static void __dispatch_internal_32(int cpu) __maybe_unused;
|
|
+static void __dispatch_internal_64(int cpu) __maybe_unused;
|
|
static void __internal_irq_mask_32(unsigned int irq) __maybe_unused;
|
|
static void __internal_irq_mask_64(unsigned int irq) __maybe_unused;
|
|
static void __internal_irq_unmask_32(unsigned int irq) __maybe_unused;
|
|
@@ -158,7 +158,7 @@ static inline void bcm63xx_init_irq(void
|
|
#else /* ! BCMCPU_RUNTIME_DETECT */
|
|
|
|
static u32 irq_stat_addr0, irq_mask_addr0, irq_stat_addr1, irq_mask_addr1;
|
|
-static void (*dispatch_internal)(void);
|
|
+static void (*dispatch_internal)(int cpu);
|
|
static int is_ext_irq_cascaded;
|
|
static unsigned int ext_irq_count;
|
|
static unsigned int ext_irq_start, ext_irq_end;
|
|
@@ -315,14 +315,15 @@ static inline void handle_internal(int i
|
|
*/
|
|
|
|
#define BUILD_IPIC_INTERNAL(width) \
|
|
-void __dispatch_internal_##width(void) \
|
|
+void __dispatch_internal_##width(int cpu) \
|
|
{ \
|
|
u32 pending[width / 32]; \
|
|
unsigned int src, tgt; \
|
|
bool irqs_pending = false; \
|
|
- static int i; \
|
|
- u32 irq_stat_addr = get_irq_stat_addr(0); \
|
|
- u32 irq_mask_addr = get_irq_mask_addr(0); \
|
|
+ static int i[NR_CPUS]; \
|
|
+ u32 irq_stat_addr = get_irq_stat_addr(cpu); \
|
|
+ u32 irq_mask_addr = get_irq_mask_addr(cpu); \
|
|
+ int *next = &i[cpu]; \
|
|
\
|
|
/* read registers in reverse order */ \
|
|
for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
|
|
@@ -340,9 +341,9 @@ void __dispatch_internal_##width(void)
|
|
return; \
|
|
\
|
|
while (1) { \
|
|
- int to_call = i; \
|
|
+ int to_call = *next; \
|
|
\
|
|
- i = (i + 1) & (width - 1); \
|
|
+ *next = (*next + 1) & (width - 1); \
|
|
if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
|
|
handle_internal(to_call); \
|
|
break; \
|
|
@@ -394,7 +395,7 @@ asmlinkage void plat_irq_dispatch(void)
|
|
if (cause & CAUSEF_IP1)
|
|
do_IRQ(1);
|
|
if (cause & CAUSEF_IP2)
|
|
- dispatch_internal();
|
|
+ dispatch_internal(0);
|
|
if (!is_ext_irq_cascaded) {
|
|
if (cause & CAUSEF_IP3)
|
|
do_IRQ(IRQ_EXT_0);
|