RealTek's 2.5G PHYs suffer from an up to now inexplicable problem which
results in the SerDes mode not being properly setup and disabling
in-band AN leading to a timeout waiting for a busy-bit to clear. Up to
now there has been a crude work-around: resetting the PHY and trying
another time.
The cause has now been found as a wrong access to register PHYCR1 on
MDIO_MMD_VEND1 instead of MDIO_MMD_VEND2 when setting up ALDPS as well
as disabling the MDIO broadcast address 0.
In order to access MDIO_MMD_VEND2 on Clause-22-only busses a custom
.read_mmd and .write_mmd ops are implemented, mapping MDIO_MMD_VEND2 to
paged access as this is required.
Also, as ALDPS by design disables the SerDes PCS of the PHY in case the
link has been down for a while, move enabling ALDPS to the end of the
config_init function to not face problems when configuring the interface
mode and in-band AN.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
5652b98952