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48c9e55094
Backport of the latest upstream Realtek PHY patches. WoL uses devm_pm_set_wake_irq(), so the patch that adds this function has also been backported. Changelog: 4465ae435ddc net: phy: realtek: create rtl8211f_config_phy_eee() helper bb78b71faf60 net: phy: realtek: eliminate priv->phycr1 variable e1a31c41bef6 net: phy: realtek: allow CLKOUT to be disabled on RTL8211F(D)(I)-VD-CG 910ac7bfb1af net: phy: realtek: eliminate has_phycr2 variable 27033d069177 net: phy: realtek: eliminate priv->phycr2 variable 8e982441ba60 net: phy: realtek: create rtl8211f_config_rgmii_delay() b826bf795564 net: phy: realtek: fix RTL8211F wake-on-lan support Tested on Netgear WAX206 with RTL8221B-VB-CG. Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl> Link: https://github.com/openwrt/openwrt/pull/20987 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
43 lines
1.4 KiB
Diff
43 lines
1.4 KiB
Diff
From 9155098547fb1172d4fa536f3f6bc9d42f59d08c Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Sat, 22 Apr 2023 03:26:01 +0100
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Subject: [PATCH] net: phy: realtek: setup ALDPS on RTL822x
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Setup Link Down Power Saving Mode according the DTS property
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just like for RTL821x 1GE PHYs.
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++
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1 file changed, 11 insertions(+)
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--- a/drivers/net/phy/realtek/realtek_main.c
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+++ b/drivers/net/phy/realtek/realtek_main.c
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@@ -162,6 +162,10 @@
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#define RTL8224_SRAM_RTCT_LEN(pair) (0x8028 + (pair) * 4)
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+#define RTL8221B_PHYCR1 0xa430
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+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
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+#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
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+
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#define RTL8366RB_POWER_SAVE 0x15
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#define RTL8366RB_POWER_SAVE_ON BIT(12)
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@@ -1305,6 +1309,15 @@ static int rtl822x_set_serdes_option_mod
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return ret;
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}
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+ if (of_property_read_bool(phydev->mdio.dev.of_node, "realtek,aldps-enable"))
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+ ret = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
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+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
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+ else
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+ ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, RTL8221B_PHYCR1,
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+ RTL8221B_PHYCR1_ALDPS_EN | RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN);
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+ if (ret < 0)
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+ return ret;
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+
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/* Disable SGMII AN */
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ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x7588, 0x2);
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if (ret < 0)
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