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	Similar to the lzma-loader on our MIPS targets, the spi-loader acts as a second-stage loader that will then load and start the actual kernel. As the TL-WDR4900 uses SPI-NOR and the P1010 family does not have support for memory mapping of this type of flash, this loader needs to contain a basic driver for the FSL ESPI controller. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
		
			
				
	
	
		
			102 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			102 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| 
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| #pragma once
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| 
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| #include <stdint.h>
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| 
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| /*
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|  * Low-level I/O routines.
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|  *
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|  * Copied from <file:arch/powerpc/include/asm/io.h> (which has no copyright)
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|  */
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| static inline uint8_t in_8(const volatile uint8_t *addr)
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| {
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| 	int ret;
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| 
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| 	__asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
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| 			     : "=r" (ret) : "m" (*addr));
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| 	return ret;
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| }
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| 
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| static inline void out_8(volatile uint8_t *addr, uint8_t val)
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| {
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| 	__asm__ __volatile__("stb%U0%X0 %1,%0; sync"
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| 			     : "=m" (*addr) : "r" (val));
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| }
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| 
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| static inline uint16_t in_le16(const volatile uint16_t *addr)
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| {
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| 	uint32_t ret;
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| 
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| 	__asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
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| 			     : "=r" (ret) : "r" (addr), "m" (*addr));
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| 
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| 	return ret;
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| }
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| 
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| static inline uint16_t in_be16(const volatile uint16_t *addr)
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| {
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| 	uint32_t ret;
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| 
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| 	__asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
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| 			     : "=r" (ret) : "m" (*addr));
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| 	return ret;
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| }
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| 
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| static inline void out_le16(volatile uint16_t *addr, uint16_t val)
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| {
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| 	__asm__ __volatile__("sthbrx %1,0,%2; sync" : "=m" (*addr)
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| 			     : "r" (val), "r" (addr));
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| }
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| 
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| static inline void out_be16(volatile uint16_t *addr, uint16_t val)
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| {
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| 	__asm__ __volatile__("sth%U0%X0 %1,%0; sync"
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| 			     : "=m" (*addr) : "r" (val));
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| }
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| 
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| static inline uint32_t in_le32(const volatile uint32_t *addr)
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| {
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| 	uint32_t ret;
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| 
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| 	__asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync"
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| 			     : "=r" (ret) : "r" (addr), "m" (*addr));
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| 	return ret;
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| }
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| 
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| static inline uint32_t in_be32(const volatile uint32_t *addr)
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| {
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| 	uint32_t ret;
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| 
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| 	__asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
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| 			     : "=r" (ret) : "m" (*addr));
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| 	return ret;
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| }
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| 
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| static inline void out_le32(volatile uint32_t *addr, uint32_t val)
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| {
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| 	__asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr)
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| 			     : "r" (val), "r" (addr));
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| }
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| 
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| static inline void out_be32(volatile uint32_t *addr, uint32_t val)
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| {
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| 	__asm__ __volatile__("stw%U0%X0 %1,%0; sync"
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| 			     : "=m" (*addr) : "r" (val));
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| }
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| 
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| static inline void sync(void)
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| {
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| 	asm volatile("sync" : : : "memory");
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| }
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| 
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| static inline void eieio(void)
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| {
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| 	asm volatile("eieio" : : : "memory");
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| }
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| 
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| static inline void barrier(void)
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| {
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| 	asm volatile("" : : : "memory");
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| }
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