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92012dd867
This chip is used on Teltonika RUTX boards. Signed-off-by: Felix Matouschek <felix@matouschek.org>
196 lines
5.9 KiB
Diff
196 lines
5.9 KiB
Diff
From 8ffe91b6b429277bd7bd79267ba836edf951dce2 Mon Sep 17 00:00:00 2001
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From: Felix Matouschek <felix@matouschek.org>
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Date: Fri, 2 Jul 2021 20:31:23 +0200
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Subject: [PATCH] mtd: spinand: Add support for XTX XT26G0xA
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Add support for XTX Technology XT26G01AXXXXX, XTX26G02AXXXXX and
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XTX26G04AXXXXX SPI NAND.
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These are 3V, 1G/2G/4Gbit serial SLC NAND flash devices with on-die ECC
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(8bit strength per 512bytes).
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Tested on Teltonika RUTX10 flashed with OpenWrt.
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Datasheets available at
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http://www.xtxtech.com/download/?AId=225
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https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT26G01AWSEGA_C558841.pdf
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Signed-off-by: Felix Matouschek <felix@matouschek.org>
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---
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drivers/mtd/nand/spi/Makefile | 2 +-
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drivers/mtd/nand/spi/core.c | 1 +
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drivers/mtd/nand/spi/xtx.c | 139 ++++++++++++++++++++++++++++++++++
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include/linux/mtd/spinand.h | 1 +
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4 files changed, 142 insertions(+), 1 deletion(-)
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create mode 100644 drivers/mtd/nand/spi/xtx.c
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--- a/drivers/mtd/nand/spi/Makefile
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+++ b/drivers/mtd/nand/spi/Makefile
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@@ -1,3 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
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+spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
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obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
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--- a/drivers/mtd/nand/spi/core.c
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+++ b/drivers/mtd/nand/spi/core.c
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@@ -758,6 +758,7 @@ static const struct spinand_manufacturer
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¶gon_spinand_manufacturer,
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&toshiba_spinand_manufacturer,
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&winbond_spinand_manufacturer,
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+ &xtx_spinand_manufacturer,
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};
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static int spinand_manufacturer_detect(struct spinand_device *spinand)
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--- /dev/null
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+++ b/drivers/mtd/nand/spi/xtx.c
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@@ -0,0 +1,139 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Author:
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+ * Felix Matouschek <felix@matouschek.org>
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+ */
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+
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+#include <linux/device.h>
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+#include <linux/kernel.h>
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+#include <linux/mtd/spinand.h>
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+
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+#define SPINAND_MFR_XTX 0x0B
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+
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+#define XT26G0XA_STATUS_ECC_MASK GENMASK(5, 2)
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+#define XT26G0XA_STATUS_ECC_NO_DETECTED (0 << 2)
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+#define XT26G0XA_STATUS_ECC_8_CORRECTED (3 << 4)
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+#define XT26G0XA_STATUS_ECC_UNCOR_ERROR (2 << 4)
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+
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+static SPINAND_OP_VARIANTS(read_cache_variants,
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+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(write_cache_variants,
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+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(update_cache_variants,
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+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
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+
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+static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ region->offset = 8;
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+ region->length = 40;
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+
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+ return 0;
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+}
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+
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+static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ region->offset = 1;
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+ region->length = 7;
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+
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+ return 0;
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+}
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+
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+static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = {
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+ .ecc = xt26g0xa_ooblayout_ecc,
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+ .free = xt26g0xa_ooblayout_free,
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+};
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+
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+static int xt26g0xa_ecc_get_status(struct spinand_device *spinand,
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+ u8 status)
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+{
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+ switch (status & XT26G0XA_STATUS_ECC_MASK) {
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+ case XT26G0XA_STATUS_ECC_NO_DETECTED:
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+ return 0;
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+ case XT26G0XA_STATUS_ECC_8_CORRECTED:
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+ return 8;
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+ case XT26G0XA_STATUS_ECC_UNCOR_ERROR:
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+ return -EBADMSG;
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+ default: /* (1 << 2) through (7 << 2) are 1-7 corrected errors */
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+ return (status & XT26G0XA_STATUS_ECC_MASK) >> 2;
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+ }
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+
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+ return -EINVAL;
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+}
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+
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+static const struct spinand_info xtx_spinand_table[] = {
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+ SPINAND_INFO("XT26G01A", 0xE1,
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+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
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+ xt26g0xa_ecc_get_status)),
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+ SPINAND_INFO("XT26G02A", 0xE2,
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+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
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+ xt26g0xa_ecc_get_status)),
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+ SPINAND_INFO("XT26G04A", 0xE3,
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+ NAND_MEMORG(1, 2048, 64, 128, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
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+ xt26g0xa_ecc_get_status)),
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+};
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+
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+static int xtx_spinand_detect(struct spinand_device *spinand)
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+{
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+ u8 *id = spinand->id.data;
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+ int ret;
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+
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+ /*
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+ * XTX SPI NAND read ID needs a dummy byte, so the first byte in
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+ * raw_id is garbage.
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+ */
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+ if (id[1] != SPINAND_MFR_XTX)
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+ return 0;
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+
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+ ret = spinand_match_and_init(spinand, xtx_spinand_table,
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+ ARRAY_SIZE(xtx_spinand_table),
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+ id[2]);
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+ if (ret)
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+ return ret;
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+
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+ return 1;
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+}
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+
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+static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
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+ .detect = xtx_spinand_detect,
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+};
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+
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+const struct spinand_manufacturer xtx_spinand_manufacturer = {
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+ .id = SPINAND_MFR_XTX,
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+ .name = "XTX",
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+ .ops = &xtx_spinand_manuf_ops,
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+};
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--- a/include/linux/mtd/spinand.h
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+++ b/include/linux/mtd/spinand.h
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@@ -230,6 +230,7 @@ extern const struct spinand_manufacturer
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extern const struct spinand_manufacturer paragon_spinand_manufacturer;
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extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
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extern const struct spinand_manufacturer winbond_spinand_manufacturer;
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+extern const struct spinand_manufacturer xtx_spinand_manufacturer;
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/**
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* struct spinand_op_variants - SPI NAND operation variants
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