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	This is what the vendor bootloader does on KD20. Signed-off-by: Daniel Golle <daniel@makrotopia.org> SVN-Revision: 43509
		
			
				
	
	
		
			143 lines
		
	
	
		
			4.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			143 lines
		
	
	
		
			4.1 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From e719404ee1241af679a51879eaad291bc27e4817 Mon Sep 17 00:00:00 2001
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| From: Daniel Golle <daniel@makrotopia.org>
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| Date: Tue, 2 Dec 2014 14:46:05 +0100
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| Subject: [PATCH] net/phy: add back icplus driver
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| 
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| IC+ phy driver was removed due to the lack of users some time ago.
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| Add it back, so we can use it.
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| ---
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|  drivers/net/phy/Makefile |  1 +
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|  drivers/net/phy/icplus.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++
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|  drivers/net/phy/phy.c    |  3 ++
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|  3 files changed, 84 insertions(+)
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|  create mode 100644 drivers/net/phy/icplus.c
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| 
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| --- a/drivers/net/phy/Makefile
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| +++ b/drivers/net/phy/Makefile
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| @@ -15,6 +15,7 @@ obj-$(CONFIG_PHY_ATHEROS) += atheros.o
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|  obj-$(CONFIG_PHY_BROADCOM) += broadcom.o
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|  obj-$(CONFIG_PHY_DAVICOM) += davicom.o
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|  obj-$(CONFIG_PHY_ET1011C) += et1011c.o
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| +obj-$(CONFIG_PHY_ICPLUS) += icplus.o
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|  obj-$(CONFIG_PHY_LXT) += lxt.o
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|  obj-$(CONFIG_PHY_MARVELL) += marvell.o
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|  obj-$(CONFIG_PHY_MICREL) += micrel.o
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| --- /dev/null
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| +++ b/drivers/net/phy/icplus.c
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| @@ -0,0 +1,93 @@
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| +/*
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| + * ICPlus PHY drivers
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| + *
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| + * SPDX-License-Identifier:	GPL-2.0+
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| + *
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| + * Copyright (c) 2007 Freescale Semiconductor, Inc.
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| + */
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| +#include <phy.h>
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| +
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| +/* IP101A/G - IP1001 */
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| +#define IP10XX_SPEC_CTRL_STATUS         16      /* Spec. Control Register */
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| +#define IP1001_SPEC_CTRL_STATUS_2       20      /* IP1001 Spec. Control Reg 2 */
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| +#define IP1001_PHASE_SEL_MASK           3       /* IP1001 RX/TXPHASE_SEL */
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| +#define IP1001_APS_ON                   11      /* IP1001 APS Mode  bit */
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| +#define IP101A_G_APS_ON                 2       /* IP101A/G APS Mode bit */
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| +#define IP101A_G_IRQ_CONF_STATUS        0x11    /* Conf Info IRQ & Status Reg */
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| +#define IP101A_G_IRQ_PIN_USED           (1<<15) /* INTR pin used */
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| +#define IP101A_G_IRQ_DEFAULT            IP101A_G_IRQ_PIN_USED
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| +#define IP1001LF_DRIVE_MASK     (15 << 5)
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| +#define IP1001LF_RXCLKDRIVE_HI  (2  << 5)
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| +#define IP1001LF_RXDDRIVE_HI    (2  << 7)
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| +#define IP1001LF_RXCLKDRIVE_M   (1  << 5)
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| +#define IP1001LF_RXDDRIVE_M     (1  << 7)
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| +#define IP1001LF_RXCLKDRIVE_L   (0  << 5)
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| +#define IP1001LF_RXDDRIVE_L     (0  << 7)
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| +#define IP1001LF_RXCLKDRIVE_VL  (3  << 5)
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| +#define IP1001LF_RXDDRIVE_VL    (3  << 7)
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| +
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| +static int ip1001_config(struct phy_device *phydev)
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| +{
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| +	int c;
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| +
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| +	/* Enable Auto Power Saving mode */
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| +	c = phy_read(phydev, MDIO_DEVAD_NONE, IP1001_SPEC_CTRL_STATUS_2);
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| +	if (c < 0)
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| +		return c;
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| +	c |= IP1001_APS_ON;
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| +	c = phy_write(phydev, MDIO_DEVAD_NONE, IP1001_SPEC_CTRL_STATUS_2, c);
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| +	if (c < 0)
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| +		return c;
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| +
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| +	/* INTR pin used: speed/link/duplex will cause an interrupt */
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| +	c = phy_write(phydev, MDIO_DEVAD_NONE, IP101A_G_IRQ_CONF_STATUS,
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| +		      IP101A_G_IRQ_DEFAULT);
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| +	if (c < 0)
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| +		return c;
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| +
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| +	if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
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| +		/*
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| +		 * Additional delay (2ns) used to adjust RX clock phase
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| +		 * at RGMII interface
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| +		 */
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| +		c = phy_read(phydev, MDIO_DEVAD_NONE, IP10XX_SPEC_CTRL_STATUS);
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| +		if (c < 0)
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| +			return c;
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| +
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| +		c |= IP1001_PHASE_SEL_MASK;
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| +		/* adjust digtial drive strength */
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| +		c &= ~IP1001LF_DRIVE_MASK;
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| +		c |=  IP1001LF_RXCLKDRIVE_M;
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| +		c |=  IP1001LF_RXDDRIVE_M;
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| +		c = phy_write(phydev, MDIO_DEVAD_NONE, IP10XX_SPEC_CTRL_STATUS,
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| +			      c);
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| +		if (c < 0)
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| +			return c;
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| +	}
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| +
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| +	return 0;
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| +}
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| +
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| +static int ip1001_startup(struct phy_device *phydev)
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| +{
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| +	genphy_update_link(phydev);
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| +	genphy_parse_link(phydev);
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| +
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| +	return 0;
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| +}
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| +static struct phy_driver IP1001_driver = {
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| +	.name = "ICPlus IP1001",
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| +	.uid = 0x02430d90,
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| +	.mask = 0x0ffffff0,
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| +	.features = PHY_GBIT_FEATURES,
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| +	.config = &ip1001_config,
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| +	.startup = &ip1001_startup,
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| +	.shutdown = &genphy_shutdown,
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| +};
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| +
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| +int phy_icplus_init(void)
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| +{
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| +	phy_register(&IP1001_driver);
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| +
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| +	return 0;
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| +}
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| --- a/drivers/net/phy/phy.c
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| +++ b/drivers/net/phy/phy.c
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| @@ -454,6 +454,9 @@ int phy_init(void)
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|  #ifdef CONFIG_PHY_ET1011C
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|  	phy_et1011c_init();
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|  #endif
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| +#ifdef CONFIG_PHY_ICPLUS
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| +	phy_icplus_init();
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| +#endif
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|  #ifdef CONFIG_PHY_LXT
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|  	phy_lxt_init();
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|  #endif
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| --- a/include/phy.h
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| +++ b/include/phy.h
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| @@ -225,6 +225,7 @@ int phy_atheros_init(void);
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|  int phy_broadcom_init(void);
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|  int phy_davicom_init(void);
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|  int phy_et1011c_init(void);
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| +int phy_icplus_init(void);
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|  int phy_lxt_init(void);
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|  int phy_marvell_init(void);
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|  int phy_micrel_init(void);
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