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	This updates mac80211 to backports based on kernel 4.19-rc4. I plan to integrate all the patches which are in this tar into upstream backports soon. I used the backports generated from this code: https://github.com/hauke/backports/commits/wip2 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
		
			
				
	
	
		
			119 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			119 lines
		
	
	
		
			4.6 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 9782a7f7488443568fa4d6088b73c9aff7eb8510 Mon Sep 17 00:00:00 2001
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| From: Daniel Golle <daniel@makrotopia.org>
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| Date: Wed, 19 Apr 2017 16:14:53 +0200
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| Subject: [PATCH] rt2x00: add support for external PA on MT7620
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| To: Stanislaw Gruszka <sgruszka@redhat.com>
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| Cc: Helmut Schaa <helmut.schaa@googlemail.com>,
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|     linux-wireless@vger.kernel.org,
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|     Kalle Valo <kvalo@codeaurora.org>
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| 
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| Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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| ---
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|  drivers/net/wireless/ralink/rt2x00/rt2800.h    |  1 +
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|  drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 70 +++++++++++++++++++++++++-
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|  2 files changed, 70 insertions(+), 1 deletion(-)
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| 
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| --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
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| +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
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| @@ -2750,6 +2750,7 @@ enum rt2800_eeprom_word {
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|  #define EEPROM_NIC_CONF2_RX_STREAM	FIELD16(0x000f)
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|  #define EEPROM_NIC_CONF2_TX_STREAM	FIELD16(0x00f0)
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|  #define EEPROM_NIC_CONF2_CRYSTAL	FIELD16(0x0600)
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| +#define EEPROM_NIC_CONF2_EXTERNAL_PA	FIELD16(0xc000)
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|  
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|  /*
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|   * EEPROM LNA
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| --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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| +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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| @@ -4123,6 +4123,61 @@ static void rt2800_config_channel(struct
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|  		rt2800_iq_calibrate(rt2x00dev, rf->channel);
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|  	}
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|  
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| +	if (rt2x00_rt(rt2x00dev, RT6352)) {
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| +		if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
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| +			     &rt2x00dev->cap_flags)) {
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| +			rt2x00_warn(rt2x00dev, "Using incomplete support for " \
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| +					       "external PA\n");
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| +			reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
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| +			reg |= 0x00000101;
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| +			rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
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| +
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| +			reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
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| +			reg |= 0x00000101;
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| +			rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
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| +
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 43, 0x73);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 43, 0x73);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 44, 0x73);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 44, 0x73);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 45, 0x73);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0x73);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 46, 0x27);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 46, 0x27);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0xC8);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0xC8);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 48, 0xA4);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 48, 0xA4);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 49, 0x05);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 49, 0x05);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x27);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 55, 0xC8);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 55, 0xC8);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 56, 0xA4);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 56, 0xA4);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 57, 0x05);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 57, 0x05);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 58, 0x27);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 58, 0x27);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 59, 0xC8);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 59, 0xC8);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 60, 0xA4);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 60, 0xA4);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 4, 61, 0x05);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 6, 61, 0x05);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 5, 05, 0x00);
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| +			rt2800_rfcsr_write_bank(rt2x00dev, 7, 05, 0x00);
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| +
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| +			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
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| +					      0x36303636);
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| +			rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
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| +					      0x6C6C6B6C);
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| +			rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
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| +					      0x6C6C6B6C);
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| +		}
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| +	}
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| +
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|  	bbp = rt2800_bbp_read(rt2x00dev, 4);
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|  	rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
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|  	rt2800_bbp_write(rt2x00dev, 4, bbp);
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| @@ -9320,7 +9375,8 @@ static int rt2800_init_eeprom(struct rt2
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|  	 */
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|  	eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);
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|  
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| -	if (rt2x00_rt(rt2x00dev, RT3352)) {
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| +	if (rt2x00_rt(rt2x00dev, RT3352) ||
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| +	    rt2x00_rt(rt2x00dev, RT6352)) {
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|  		if (rt2x00_get_field16(eeprom,
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|  		    EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352))
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|  		    __set_bit(CAPABILITY_EXTERNAL_PA_TX0,
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| @@ -9331,6 +9387,18 @@ static int rt2800_init_eeprom(struct rt2
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|  			      &rt2x00dev->cap_flags);
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|  	}
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|  
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| +	eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2);
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| +
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| +	if (rt2x00_rt(rt2x00dev, RT6352) && eeprom != 0 && eeprom != 0xffff) {
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| +		if (rt2x00_get_field16(eeprom,
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| +		    EEPROM_NIC_CONF2_EXTERNAL_PA)) {
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| +		    __set_bit(CAPABILITY_EXTERNAL_PA_TX0,
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| +			      &rt2x00dev->cap_flags);
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| +		    __set_bit(CAPABILITY_EXTERNAL_PA_TX1,
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| +			      &rt2x00dev->cap_flags);
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| +		}
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| +	}
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| +
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|  	return 0;
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|  }
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|  
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